diff --git a/llvm/include/llvm/Target/TargetTransformImpl.h b/llvm/include/llvm/Target/TargetTransformImpl.h index 7648f4f935c4..ec39f9968e01 100644 --- a/llvm/include/llvm/Target/TargetTransformImpl.h +++ b/llvm/include/llvm/Target/TargetTransformImpl.h @@ -47,7 +47,23 @@ public: virtual unsigned getJumpBufSize() const; }; -class VectorTargetTransformImpl : public VectorTargetTransformInfo { }; +class VectorTargetTransformImpl : public VectorTargetTransformInfo { +private: + const TargetLowering *TLI; + +public: + explicit VectorTargetTransformImpl(const TargetLowering *TL) : TLI(TL) {} + + virtual ~VectorTargetTransformImpl() {} + + virtual unsigned getInstrCost(unsigned Opcode, Type *Ty1, Type *Ty2) const; + + virtual unsigned getBroadcastCost(Type *Tp) const; + + virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, + unsigned Alignment, + unsigned AddressSpace) const; +}; } // end llvm namespace diff --git a/llvm/include/llvm/TargetTransformInfo.h b/llvm/include/llvm/TargetTransformInfo.h index 82fc14dbd743..96470c30ca58 100644 --- a/llvm/include/llvm/TargetTransformInfo.h +++ b/llvm/include/llvm/TargetTransformInfo.h @@ -54,10 +54,10 @@ public: TargetTransformInfo(const TargetTransformInfo &T) : ImmutablePass(ID), STTI(T.STTI), VTTI(T.VTTI) { } - const ScalarTargetTransformInfo* getScalarTargetTransformInfo() { + const ScalarTargetTransformInfo* getScalarTargetTransformInfo() const { return STTI; } - const VectorTargetTransformInfo* getVectorTargetTransformInfo() { + const VectorTargetTransformInfo* getVectorTargetTransformInfo() const { return VTTI; } @@ -119,8 +119,43 @@ public: } }; +/// VectorTargetTransformInfo - This interface is used by the vectorizers +/// to estimate the profitability of vectorization for different instructions. class VectorTargetTransformInfo { - // TODO: define an interface for VectorTargetTransformInfo. +public: + virtual ~VectorTargetTransformInfo() {} + + /// Returns the expected cost of the instruction opcode. The opcode is one of + /// the enums like Instruction::Add. The type arguments are the type of the + /// operation. + /// Most instructions only use the first type and in that case the second + /// operand is ignored. + /// + /// Exceptions: + /// * Br instructions do not use any of the types. + /// * Select instructions pass the return type as Ty1 and the selector as Ty2. + /// * Cast instructions pass the destination as Ty1 and the source as Ty2. + /// * Insert/Extract element pass only the vector type as Ty1. + /// * ShuffleVector, Load, Store do not use this call. + virtual unsigned getInstrCost(unsigned Opcode, + Type *Ty1 = 0, + Type *Ty2 = 0) const { + return 1; + } + + /// Returns the cost of a vector broadcast of a scalar at place zero to a + /// vector of type 'Tp'. + virtual unsigned getBroadcastCost(Type *Tp) const { + return 1; + } + + /// Returns the cost of Load and Store instructions. + virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src, + unsigned Alignment, + unsigned AddressSpace) const { + return 1; + } + }; } // End llvm namespace diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index c51ae24c50e3..fdff55edfe83 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -72,7 +72,7 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT, TLInfo(*this), TSInfo(*this), FrameLowering(Subtarget), - STTI(&TLInfo) { + STTI(&TLInfo), VTTI(&TLInfo) { if (!Subtarget.hasARMOps()) report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not " "support ARM mode execution!"); @@ -106,7 +106,7 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT, FrameLowering(Subtarget.hasThumb2() ? new ARMFrameLowering(Subtarget) : (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)), - STTI(&TLInfo){ + STTI(&TLInfo), VTTI(&TLInfo) { } namespace { diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp index e92ad01e1d5a..918316572a2e 100644 --- a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp +++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -44,7 +44,7 @@ SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT, TLInfo(*this), TSInfo(*this), InstrItins(Subtarget.getInstrItineraryData()), - STTI(&TLInfo){ + STTI(&TLInfo), VTTI(&TLInfo) { } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index 353542a8097e..30866e9eeba8 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -75,7 +75,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT, TSInfo(*this), FrameLowering(Subtarget), InstrItins(&Subtarget.getInstrItineraryData()), - STTI(&TLInfo) { + STTI(&TLInfo), VTTI(&TLInfo) { setMCUseCFI(false); } diff --git a/llvm/lib/Target/MBlaze/MBlazeTargetMachine.cpp b/llvm/lib/Target/MBlaze/MBlazeTargetMachine.cpp index cb5f46062d99..1ae2baa19833 100644 --- a/llvm/lib/Target/MBlaze/MBlazeTargetMachine.cpp +++ b/llvm/lib/Target/MBlaze/MBlazeTargetMachine.cpp @@ -42,7 +42,8 @@ MBlazeTargetMachine(const Target &T, StringRef TT, InstrInfo(*this), FrameLowering(Subtarget), TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this), - InstrItins(Subtarget.getInstrItineraryData()), STTI(&TLInfo) { + InstrItins(Subtarget.getInstrItineraryData()), + STTI(&TLInfo), VTTI(&TLInfo) { } namespace { diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp index 29ea68121621..13e37b373533 100644 --- a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -36,7 +36,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, // FIXME: Check DataLayout string. DL("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"), InstrInfo(*this), TLInfo(*this), TSInfo(*this), - FrameLowering(Subtarget), STTI(&TLInfo) { } + FrameLowering(Subtarget), STTI(&TLInfo), VTTI(&TLInfo) { } namespace { /// MSP430 Code Generator Pass Configuration Options. diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index 4c3981d9f68b..7d73866562b4 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -53,7 +53,7 @@ MipsTargetMachine(const Target &T, StringRef TT, InstrInfo(MipsInstrInfo::create(*this)), FrameLowering(MipsFrameLowering::create(*this, Subtarget)), TLInfo(*this), TSInfo(*this), JITInfo(), - ELFWriterInfo(false, isLittle), STTI(&TLInfo) { + ELFWriterInfo(false, isLittle), STTI(&TLInfo), VTTI(&TLInfo) { } void MipsebTargetMachine::anchor() { } diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h index 60822d0c055f..a62db327e5fb 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.h +++ b/llvm/lib/Target/Mips/MipsTargetMachine.h @@ -40,7 +40,7 @@ class MipsTargetMachine : public LLVMTargetMachine { MipsJITInfo JITInfo; MipsELFWriterInfo ELFWriterInfo; ScalarTargetTransformImpl STTI; - VectorTargetTransformInfo VTTI; + VectorTargetTransformImpl VTTI; public: MipsTargetMachine(const Target &T, StringRef TT, diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 7519b4a08317..cbb490003d37 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -73,7 +73,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, Subtarget(TT, CPU, FS, is64bit), DL(Subtarget.getDataLayout()), InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(*this,is64bit), - STTI(&TLInfo) + STTI(&TLInfo), VTTI(&TLInfo) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ { } diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index b86138347537..3fc977ee2b41 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -44,7 +44,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, FrameLowering(Subtarget), JITInfo(*this, is64Bit), TLInfo(*this), TSInfo(*this), InstrItins(Subtarget.getInstrItineraryData()), - STTI(&TLInfo){ + STTI(&TLInfo), VTTI(&TLInfo) { // The binutils for the BG/P are too old for CFI. if (Subtarget.isBGP()) diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp index 1d8cc771ddf2..45c962471dda 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp @@ -36,7 +36,7 @@ SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT, DL(Subtarget.getDataLayout()), InstrInfo(Subtarget), TLInfo(*this), TSInfo(*this), - FrameLowering(Subtarget),STTI(&TLInfo) { + FrameLowering(Subtarget), STTI(&TLInfo), VTTI(&TLInfo) { } namespace { diff --git a/llvm/lib/Target/TargetTransformImpl.cpp b/llvm/lib/Target/TargetTransformImpl.cpp index 1cb5edab9d0c..cee736bd7168 100644 --- a/llvm/lib/Target/TargetTransformImpl.cpp +++ b/llvm/lib/Target/TargetTransformImpl.cpp @@ -12,6 +12,12 @@ using namespace llvm; +//===----------------------------------------------------------------------===// +// +// Calls used by scalar transformations. +// +//===----------------------------------------------------------------------===// + bool ScalarTargetTransformImpl::isLegalAddImmediate(int64_t imm) const { return TLI->isLegalAddImmediate(imm); } @@ -41,3 +47,27 @@ unsigned ScalarTargetTransformImpl::getJumpBufAlignment() const { unsigned ScalarTargetTransformImpl::getJumpBufSize() const { return TLI->getJumpBufSize(); } + +//===----------------------------------------------------------------------===// +// +// Calls used by the vectorizers. +// +//===----------------------------------------------------------------------===// + +unsigned +VectorTargetTransformImpl::getInstrCost(unsigned Opcode, Type *Ty1, + Type *Ty2) const { + return 1; +} + +unsigned +VectorTargetTransformImpl::getBroadcastCost(Type *Tp) const { + return 1; +} + +unsigned +VectorTargetTransformImpl::getMemoryOpCost(unsigned Opcode, Type *Src, + unsigned Alignment, + unsigned AddressSpace) const { + return 1; +} diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 655ede79ba3c..48f9bba1fc96 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -49,7 +49,7 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT, TSInfo(*this), TLInfo(*this), JITInfo(*this), - STTI(&TLInfo) { + STTI(&TLInfo), VTTI(&TLInfo) { } void X86_64TargetMachine::anchor() { } @@ -66,7 +66,7 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT, TSInfo(*this), TLInfo(*this), JITInfo(*this), - STTI(&TLInfo) { + STTI(&TLInfo), VTTI(&TLInfo){ } /// X86TargetMachine ctor - Create an X86 target. diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 0b7e3e10d4b0..d5a932c5189d 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -32,7 +32,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT, InstrInfo(), FrameLowering(Subtarget), TLInfo(*this), - TSInfo(*this), STTI(&TLInfo) { + TSInfo(*this), STTI(&TLInfo), VTTI(&TLInfo) { } namespace {