forked from OSchip/llvm-project
Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions.
llvm-svn: 166593
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91c8266200
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2289f2c932
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@ -47,7 +47,23 @@ public:
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virtual unsigned getJumpBufSize() const;
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};
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class VectorTargetTransformImpl : public VectorTargetTransformInfo { };
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class VectorTargetTransformImpl : public VectorTargetTransformInfo {
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private:
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const TargetLowering *TLI;
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public:
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explicit VectorTargetTransformImpl(const TargetLowering *TL) : TLI(TL) {}
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virtual ~VectorTargetTransformImpl() {}
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virtual unsigned getInstrCost(unsigned Opcode, Type *Ty1, Type *Ty2) const;
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virtual unsigned getBroadcastCost(Type *Tp) const;
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const;
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};
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} // end llvm namespace
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@ -54,10 +54,10 @@ public:
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TargetTransformInfo(const TargetTransformInfo &T) :
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ImmutablePass(ID), STTI(T.STTI), VTTI(T.VTTI) { }
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const ScalarTargetTransformInfo* getScalarTargetTransformInfo() {
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const ScalarTargetTransformInfo* getScalarTargetTransformInfo() const {
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return STTI;
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}
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const VectorTargetTransformInfo* getVectorTargetTransformInfo() {
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const VectorTargetTransformInfo* getVectorTargetTransformInfo() const {
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return VTTI;
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}
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@ -119,8 +119,43 @@ public:
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}
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};
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/// VectorTargetTransformInfo - This interface is used by the vectorizers
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/// to estimate the profitability of vectorization for different instructions.
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class VectorTargetTransformInfo {
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// TODO: define an interface for VectorTargetTransformInfo.
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public:
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virtual ~VectorTargetTransformInfo() {}
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/// Returns the expected cost of the instruction opcode. The opcode is one of
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/// the enums like Instruction::Add. The type arguments are the type of the
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/// operation.
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/// Most instructions only use the first type and in that case the second
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/// operand is ignored.
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///
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/// Exceptions:
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/// * Br instructions do not use any of the types.
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/// * Select instructions pass the return type as Ty1 and the selector as Ty2.
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/// * Cast instructions pass the destination as Ty1 and the source as Ty2.
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/// * Insert/Extract element pass only the vector type as Ty1.
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/// * ShuffleVector, Load, Store do not use this call.
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virtual unsigned getInstrCost(unsigned Opcode,
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Type *Ty1 = 0,
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Type *Ty2 = 0) const {
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return 1;
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}
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/// Returns the cost of a vector broadcast of a scalar at place zero to a
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/// vector of type 'Tp'.
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virtual unsigned getBroadcastCost(Type *Tp) const {
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return 1;
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}
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/// Returns the cost of Load and Store instructions.
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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return 1;
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}
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};
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} // End llvm namespace
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@ -72,7 +72,7 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,
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TLInfo(*this),
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TSInfo(*this),
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FrameLowering(Subtarget),
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STTI(&TLInfo) {
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STTI(&TLInfo), VTTI(&TLInfo) {
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if (!Subtarget.hasARMOps())
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report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not "
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"support ARM mode execution!");
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@ -106,7 +106,7 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,
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FrameLowering(Subtarget.hasThumb2()
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? new ARMFrameLowering(Subtarget)
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: (ARMFrameLowering*)new Thumb1FrameLowering(Subtarget)),
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STTI(&TLInfo){
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STTI(&TLInfo), VTTI(&TLInfo) {
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}
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namespace {
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@ -44,7 +44,7 @@ SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT,
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TLInfo(*this),
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TSInfo(*this),
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InstrItins(Subtarget.getInstrItineraryData()),
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STTI(&TLInfo){
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STTI(&TLInfo), VTTI(&TLInfo) {
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}
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//===----------------------------------------------------------------------===//
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@ -75,7 +75,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT,
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TSInfo(*this),
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FrameLowering(Subtarget),
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InstrItins(&Subtarget.getInstrItineraryData()),
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STTI(&TLInfo) {
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STTI(&TLInfo), VTTI(&TLInfo) {
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setMCUseCFI(false);
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}
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@ -42,7 +42,8 @@ MBlazeTargetMachine(const Target &T, StringRef TT,
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InstrInfo(*this),
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FrameLowering(Subtarget),
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TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this),
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InstrItins(Subtarget.getInstrItineraryData()), STTI(&TLInfo) {
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InstrItins(Subtarget.getInstrItineraryData()),
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STTI(&TLInfo), VTTI(&TLInfo) {
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}
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namespace {
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@ -36,7 +36,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T,
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// FIXME: Check DataLayout string.
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DL("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"),
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InstrInfo(*this), TLInfo(*this), TSInfo(*this),
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FrameLowering(Subtarget), STTI(&TLInfo) { }
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FrameLowering(Subtarget), STTI(&TLInfo), VTTI(&TLInfo) { }
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namespace {
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/// MSP430 Code Generator Pass Configuration Options.
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@ -53,7 +53,7 @@ MipsTargetMachine(const Target &T, StringRef TT,
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InstrInfo(MipsInstrInfo::create(*this)),
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FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
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TLInfo(*this), TSInfo(*this), JITInfo(),
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ELFWriterInfo(false, isLittle), STTI(&TLInfo) {
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ELFWriterInfo(false, isLittle), STTI(&TLInfo), VTTI(&TLInfo) {
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}
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void MipsebTargetMachine::anchor() { }
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@ -40,7 +40,7 @@ class MipsTargetMachine : public LLVMTargetMachine {
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MipsJITInfo JITInfo;
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MipsELFWriterInfo ELFWriterInfo;
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ScalarTargetTransformImpl STTI;
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VectorTargetTransformInfo VTTI;
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VectorTargetTransformImpl VTTI;
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public:
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MipsTargetMachine(const Target &T, StringRef TT,
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@ -73,7 +73,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T,
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Subtarget(TT, CPU, FS, is64bit),
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DL(Subtarget.getDataLayout()),
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InstrInfo(*this), TLInfo(*this), TSInfo(*this), FrameLowering(*this,is64bit),
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STTI(&TLInfo)
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STTI(&TLInfo), VTTI(&TLInfo)
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/*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
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}
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@ -44,7 +44,7 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
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FrameLowering(Subtarget), JITInfo(*this, is64Bit),
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TLInfo(*this), TSInfo(*this),
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InstrItins(Subtarget.getInstrItineraryData()),
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STTI(&TLInfo){
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STTI(&TLInfo), VTTI(&TLInfo) {
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// The binutils for the BG/P are too old for CFI.
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if (Subtarget.isBGP())
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@ -36,7 +36,7 @@ SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
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DL(Subtarget.getDataLayout()),
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InstrInfo(Subtarget),
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TLInfo(*this), TSInfo(*this),
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FrameLowering(Subtarget),STTI(&TLInfo) {
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FrameLowering(Subtarget), STTI(&TLInfo), VTTI(&TLInfo) {
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}
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namespace {
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@ -12,6 +12,12 @@
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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//
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// Calls used by scalar transformations.
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//
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//===----------------------------------------------------------------------===//
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bool ScalarTargetTransformImpl::isLegalAddImmediate(int64_t imm) const {
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return TLI->isLegalAddImmediate(imm);
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}
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@ -41,3 +47,27 @@ unsigned ScalarTargetTransformImpl::getJumpBufAlignment() const {
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unsigned ScalarTargetTransformImpl::getJumpBufSize() const {
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return TLI->getJumpBufSize();
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}
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//===----------------------------------------------------------------------===//
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//
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// Calls used by the vectorizers.
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//
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//===----------------------------------------------------------------------===//
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unsigned
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VectorTargetTransformImpl::getInstrCost(unsigned Opcode, Type *Ty1,
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Type *Ty2) const {
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return 1;
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}
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unsigned
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VectorTargetTransformImpl::getBroadcastCost(Type *Tp) const {
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return 1;
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}
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unsigned
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VectorTargetTransformImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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return 1;
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}
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@ -49,7 +49,7 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT,
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this),
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STTI(&TLInfo) {
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STTI(&TLInfo), VTTI(&TLInfo) {
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}
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void X86_64TargetMachine::anchor() { }
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this),
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STTI(&TLInfo) {
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STTI(&TLInfo), VTTI(&TLInfo){
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}
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/// X86TargetMachine ctor - Create an X86 target.
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@ -32,7 +32,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
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InstrInfo(),
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FrameLowering(Subtarget),
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TLInfo(*this),
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TSInfo(*this), STTI(&TLInfo) {
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TSInfo(*this), STTI(&TLInfo), VTTI(&TLInfo) {
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}
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namespace {
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