forked from OSchip/llvm-project
Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
to have the predicate on the pattern itself instead. Support for the new ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are no longer used anywhere. llvm-svn: 96384
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@ -130,8 +130,6 @@ def IsThumb2 : Predicate<"Subtarget->isThumb2()">;
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def IsARM : Predicate<"!Subtarget->isThumb()">;
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def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
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def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">;
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def CarryDefIsUnused : Predicate<"!N->hasAnyUseOfValue(1)">;
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def CarryDefIsUsed : Predicate<"N->hasAnyUseOfValue(1)">;
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// FIXME: Eventually this will be just "hasV6T2Ops".
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def UseMovt : Predicate<"Subtarget->useMovt()">;
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@ -368,7 +368,7 @@ multiclass T2I_bin_ii12rs<bits<3> op23_21, string opc, PatFrag opnode,
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}
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/// T2I_adde_sube_irs - Defines a set of (op reg, {so_imm|r|so_reg}) patterns
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/// for a binary operation that produces a value and use and define the carry
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/// for a binary operation that produces a value and use the carry
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/// bit. It's not predicable.
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let Uses = [CPSR] in {
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multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Commutable = 0> {
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@ -376,7 +376,7 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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def ri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs), IIC_iALUi,
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opc, "\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUnused]> {
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Requires<[IsThumb2]> {
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let Inst{31-27} = 0b11110;
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let Inst{25} = 0;
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let Inst{24-21} = opcod;
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@ -387,7 +387,7 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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def rr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr,
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opc, ".w\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUnused]> {
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Requires<[IsThumb2]> {
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let isCommutable = Commutable;
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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@ -401,19 +401,22 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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def rs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs), IIC_iALUsi,
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opc, ".w\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUnused]> {
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Requires<[IsThumb2]> {
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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let Inst{24-21} = opcod;
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let Inst{20} = 0; // The S bit.
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}
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// Carry setting variants
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}
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// Carry setting variants
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let Defs = [CPSR] in {
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multiclass T2I_adde_sube_s_irs<bits<4> opcod, string opc, PatFrag opnode, bit Commutable = 0> {
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// shifted imm
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def Sri : T2XI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs), IIC_iALUi,
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!strconcat(opc, "s\t$dst, $lhs, $rhs"),
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def Sri : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_imm:$rhs), IIC_iALUi,
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opc, "\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_imm:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUsed]> {
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let Defs = [CPSR];
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Requires<[IsThumb2]> {
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let Inst{31-27} = 0b11110;
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let Inst{25} = 0;
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let Inst{24-21} = opcod;
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@ -421,11 +424,10 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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let Inst{15} = 0;
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}
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// register
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def Srr : T2XI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr,
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!strconcat(opc, "s.w\t$dst, $lhs, $rhs"),
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def Srr : T2sI<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr,
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opc, ".w\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, GPR:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUsed]> {
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let Defs = [CPSR];
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Requires<[IsThumb2]> {
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let isCommutable = Commutable;
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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@ -436,11 +438,10 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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let Inst{5-4} = 0b00; // type
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}
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// shifted register
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def Srs : T2XI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs), IIC_iALUsi,
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!strconcat(opc, "s.w\t$dst, $lhs, $rhs"),
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def Srs : T2sI<(outs GPR:$dst), (ins GPR:$lhs, t2_so_reg:$rhs), IIC_iALUsi,
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opc, ".w\t$dst, $lhs, $rhs",
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[(set GPR:$dst, (opnode GPR:$lhs, t2_so_reg:$rhs))]>,
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Requires<[IsThumb2, CarryDefIsUsed]> {
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let Defs = [CPSR];
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Requires<[IsThumb2]> {
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let Inst{31-27} = 0b11101;
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let Inst{26-25} = 0b01;
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let Inst{24-21} = opcod;
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@ -448,6 +449,7 @@ multiclass T2I_adde_sube_irs<bits<4> opcod, string opc, PatFrag opnode, bit Comm
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}
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}
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}
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}
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/// T2I_rbin_s_is - Same as T2I_rbin_is except sets 's' bit.
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let Defs = [CPSR] in {
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@ -1119,9 +1121,13 @@ defm t2SUBS : T2I_bin_s_irs <0b1101, "sub",
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BinOpFrag<(subc node:$LHS, node:$RHS)>>;
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defm t2ADC : T2I_adde_sube_irs<0b1010, "adc",
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BinOpFrag<(adde node:$LHS, node:$RHS)>, 1>;
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BinOpFrag<(adde_dead_carry node:$LHS, node:$RHS)>, 1>;
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defm t2SBC : T2I_adde_sube_irs<0b1011, "sbc",
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BinOpFrag<(sube node:$LHS, node:$RHS)>>;
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BinOpFrag<(sube_dead_carry node:$LHS, node:$RHS)>>;
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defm t2ADCS : T2I_adde_sube_s_irs<0b1010, "adcs",
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BinOpFrag<(adde_live_carry node:$LHS, node:$RHS)>, 1>;
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defm t2SBCS : T2I_adde_sube_s_irs<0b1011, "sbcs",
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BinOpFrag<(sube_live_carry node:$LHS, node:$RHS)>>;
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// RSB
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defm t2RSB : T2I_rbin_is <0b1110, "rsb",
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