diff --git a/llvm/utils/TableGen/CodeGenInstruction.h b/llvm/utils/TableGen/CodeGenInstruction.h
index 54f4b983a96d..b140d0021106 100644
--- a/llvm/utils/TableGen/CodeGenInstruction.h
+++ b/llvm/utils/TableGen/CodeGenInstruction.h
@@ -35,6 +35,7 @@ namespace llvm {
     /// operand list for a tablegen instruction.
     struct OperandInfo {
       /// Rec - The definition this operand is declared as.
+      ///
       Record *Rec;
 
       /// Ty - The MachineValueType of the operand.
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index ae7c4d199815..667a4df8b88a 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -103,6 +103,21 @@ void InstrInfoEmitter::run(std::ostream &OS) {
     }
   }
 
+  // Emit all of the operand info records.
+  OS << "\n";
+  for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
+       E = Target.inst_end(); II != E; ++II) {
+    const CodeGenInstruction &Inst = II->second;
+    if (!Inst.hasVariableNumberOfOperands) {
+      OS << "static const TargetOperandInfo " << Inst.TheDef->getName()
+         << "_Operands[] = {";
+      // FIXME: Emit operand info.
+      OS << "};\n";
+    }
+  }
+  
+  // Emit all of the TargetInstrDescriptor records.
+  //
   OS << "\nstatic const TargetInstrDescriptor " << TargetName
      << "Insts[] = {\n";
   emitRecord(Target.getPHIInstruction(), 0, InstrInfo, ListNumbers, OS);
@@ -173,10 +188,16 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
 
   LI = Inst.TheDef->getValueAsListInit("Defs");
   if (!LI->getSize())
-    OS << "EmptyImpList ";
+    OS << "EmptyImpList, ";
   else
-    OS << "ImplicitList" << ListNumbers[LI] << " ";
+    OS << "ImplicitList" << ListNumbers[LI] << ", ";
 
+  // Emit the operand info.
+  if (NumOperands == -1)
+    OS << "0 ";
+  else
+    OS << Inst.TheDef->getName() << "_Operands ";
+  
   OS << " },  // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n";
 }