forked from OSchip/llvm-project
[X86] Fix the immediate size to match the address size in the operand types for the move to/from absolute memory instructions.
llvm-svn: 225152
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62c0525b11
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21f984966d
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@ -554,31 +554,31 @@ def dstidx64 : Operand<iPTR> {
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let PrintMethod = "printDstIdx64"; }
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def offset16_8 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs16_8AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i16imm, i8imm);
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let PrintMethod = "printMemOffs8"; }
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def offset16_16 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs16_16AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i16imm, i8imm);
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let PrintMethod = "printMemOffs16"; }
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def offset16_32 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs16_32AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i16imm, i8imm);
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let PrintMethod = "printMemOffs32"; }
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def offset32_8 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs32_8AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i32imm, i8imm);
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let PrintMethod = "printMemOffs8"; }
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def offset32_16 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs32_16AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i32imm, i8imm);
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let PrintMethod = "printMemOffs16"; }
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def offset32_32 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs32_32AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i32imm, i8imm);
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let PrintMethod = "printMemOffs32"; }
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def offset32_64 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs32_64AsmOperand;
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let MIOperandInfo = (ops i64imm, i8imm);
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let MIOperandInfo = (ops i32imm, i8imm);
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let PrintMethod = "printMemOffs64"; }
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def offset64_8 : Operand<iPTR> {
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let ParserMatchClass = X86MemOffs64_8AsmOperand;
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