Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.

Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.

llvm-svn: 163628
This commit is contained in:
Jakob Stoklund Olesen 2012-09-11 16:34:02 +00:00
parent ab51c9de34
commit 21e2f1c6e5
4 changed files with 14 additions and 3 deletions

View File

@ -333,6 +333,13 @@ public:
return NumRegs; return NumRegs;
} }
/// getNumSubRegIndices - Return the number of sub-register indices
/// understood by the target. Index 0 is reserved for the no-op sub-register,
/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
unsigned getNumSubRegIndices() const {
return NumSubRegIndices;
}
/// getNumRegUnits - Return the number of (native) register units in the /// getNumRegUnits - Return the number of (native) register units in the
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They /// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
/// can be accessed through MCRegUnitIterator defined below. /// can be accessed through MCRegUnitIterator defined below.

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@ -327,7 +327,8 @@ public:
/// getSubRegIndexName - Return the human-readable symbolic target-specific /// getSubRegIndexName - Return the human-readable symbolic target-specific
/// name for the specified SubRegIndex. /// name for the specified SubRegIndex.
const char *getSubRegIndexName(unsigned SubIdx) const { const char *getSubRegIndexName(unsigned SubIdx) const {
assert(SubIdx && "This is not a subregister index"); assert(SubIdx && SubIdx < getNumSubRegIndices() &&
"This is not a subregister index");
return SubRegIndexNames[SubIdx-1]; return SubRegIndexNames[SubIdx-1];
} }

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@ -24,6 +24,8 @@ unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
} }
unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const { unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
assert(Idx && Idx < getNumSubRegIndices() &&
"This is not a subregister index");
// Get a pointer to the corresponding SubRegIndices list. This list has the // Get a pointer to the corresponding SubRegIndices list. This list has the
// name of each sub-register in the same order as MCSubRegIterator. // name of each sub-register in the same order as MCSubRegIterator.
const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
@ -34,6 +36,7 @@ unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
} }
unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const { unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
assert(SubReg && SubReg < getNumRegs() && "This is not a register");
// Get a pointer to the corresponding SubRegIndices list. This list has the // Get a pointer to the corresponding SubRegIndices list. This list has the
// name of each sub-register in the same order as MCSubRegIterator. // name of each sub-register in the same order as MCSubRegIterator.
const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices; const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;

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@ -770,7 +770,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
<< TargetName << "RegDiffLists, " << TargetName << "RegDiffLists, "
<< TargetName << "RegStrings, " << TargetName << "RegStrings, "
<< TargetName << "SubRegIdxLists, " << TargetName << "SubRegIdxLists, "
<< SubRegIndices.size() << ",\n" << (SubRegIndices.size() + 1) << ",\n"
<< " " << TargetName << "RegEncodingTable);\n\n"; << " " << TargetName << "RegEncodingTable);\n\n";
EmitRegMapping(OS, Regs, false); EmitRegMapping(OS, Regs, false);
@ -1131,7 +1131,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
<< " " << TargetName << "RegDiffLists,\n" << " " << TargetName << "RegDiffLists,\n"
<< " " << TargetName << "RegStrings,\n" << " " << TargetName << "RegStrings,\n"
<< " " << TargetName << "SubRegIdxLists,\n" << " " << TargetName << "SubRegIdxLists,\n"
<< " " << SubRegIndices.size() << ",\n" << " " << SubRegIndices.size() + 1 << ",\n"
<< " " << TargetName << "RegEncodingTable);\n\n"; << " " << TargetName << "RegEncodingTable);\n\n";
EmitRegMapping(OS, Regs, true); EmitRegMapping(OS, Regs, true);