forked from OSchip/llvm-project
Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.
Apparently, NumSubRegIndices was completely unused before. Adjust it by one to include the null subreg index, just like getNumRegs() includes the null register. llvm-svn: 163628
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@ -333,6 +333,13 @@ public:
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return NumRegs;
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}
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/// getNumSubRegIndices - Return the number of sub-register indices
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/// understood by the target. Index 0 is reserved for the no-op sub-register,
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/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
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unsigned getNumSubRegIndices() const {
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return NumSubRegIndices;
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}
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/// getNumRegUnits - Return the number of (native) register units in the
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/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
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/// can be accessed through MCRegUnitIterator defined below.
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@ -327,7 +327,8 @@ public:
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/// getSubRegIndexName - Return the human-readable symbolic target-specific
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/// name for the specified SubRegIndex.
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const char *getSubRegIndexName(unsigned SubIdx) const {
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assert(SubIdx && "This is not a subregister index");
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assert(SubIdx && SubIdx < getNumSubRegIndices() &&
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"This is not a subregister index");
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return SubRegIndexNames[SubIdx-1];
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}
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@ -24,6 +24,8 @@ unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
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}
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unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
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assert(Idx && Idx < getNumSubRegIndices() &&
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"This is not a subregister index");
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// Get a pointer to the corresponding SubRegIndices list. This list has the
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// name of each sub-register in the same order as MCSubRegIterator.
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const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
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@ -34,6 +36,7 @@ unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
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}
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unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
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assert(SubReg && SubReg < getNumRegs() && "This is not a register");
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// Get a pointer to the corresponding SubRegIndices list. This list has the
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// name of each sub-register in the same order as MCSubRegIterator.
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const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
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@ -770,7 +770,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
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<< TargetName << "RegDiffLists, "
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<< TargetName << "RegStrings, "
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<< TargetName << "SubRegIdxLists, "
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<< SubRegIndices.size() << ",\n"
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<< (SubRegIndices.size() + 1) << ",\n"
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<< " " << TargetName << "RegEncodingTable);\n\n";
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EmitRegMapping(OS, Regs, false);
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@ -1131,7 +1131,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
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<< " " << TargetName << "RegDiffLists,\n"
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<< " " << TargetName << "RegStrings,\n"
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<< " " << TargetName << "SubRegIdxLists,\n"
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<< " " << SubRegIndices.size() << ",\n"
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<< " " << SubRegIndices.size() + 1 << ",\n"
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<< " " << TargetName << "RegEncodingTable);\n\n";
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EmitRegMapping(OS, Regs, true);
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