forked from OSchip/llvm-project
[X86] Move code that replaces ISD::VSELECT with X86ISD::BLENDV from X86DAGToDAGISel::Select to PreprocessISelDAG
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4e86e5eedc
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21a7d08e72
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@ -862,6 +862,21 @@ void X86DAGToDAGISel::PreprocessISelDAG() {
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}
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switch (N->getOpcode()) {
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case ISD::VSELECT: {
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// Replace VSELECT with non-mask conditions with with BLENDV.
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if (N->getOperand(0).getValueType().getVectorElementType() == MVT::i1)
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break;
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assert(Subtarget->hasSSE41() && "Expected SSE4.1 support!");
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SDValue Blendv =
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CurDAG->getNode(X86ISD::BLENDV, SDLoc(N), N->getValueType(0),
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N->getOperand(0), N->getOperand(1), N->getOperand(2));
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--I;
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CurDAG->ReplaceAllUsesWith(N, Blendv.getNode());
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++I;
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CurDAG->DeleteNode(N);
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continue;
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}
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case ISD::FP_ROUND:
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case ISD::STRICT_FP_ROUND:
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case ISD::FP_TO_SINT:
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@ -4531,21 +4546,6 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
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}
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break;
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case ISD::VSELECT: {
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// Replace VSELECT with non-mask conditions with with BLENDV.
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if (Node->getOperand(0).getValueType().getVectorElementType() == MVT::i1)
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break;
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assert(Subtarget->hasSSE41() && "Expected SSE4.1 support!");
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SDValue Blendv = CurDAG->getNode(
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X86ISD::BLENDV, SDLoc(Node), Node->getValueType(0), Node->getOperand(0),
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Node->getOperand(1), Node->getOperand(2));
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ReplaceNode(Node, Blendv.getNode());
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SelectCode(Blendv.getNode());
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// We already called ReplaceUses.
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return;
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}
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case ISD::SRL:
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if (matchBitExtract(Node))
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return;
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