forked from OSchip/llvm-project
Adjust formatting to commit r292110 [NFC]
llvm-svn: 292123
This commit is contained in:
parent
92fd612c84
commit
21a059af09
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@ -151,8 +151,9 @@ static void collectInfo(Scop &S, isl_union_map **Read, isl_union_map **Write,
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// to match the new access domains, thus we need
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// to match the new access domains, thus we need
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// [Stmt[i0, i1] -> MemAcc_A[i0 + i1]] -> [0, i0, 2, i1, 0]
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// [Stmt[i0, i1] -> MemAcc_A[i0 + i1]] -> [0, i0, 2, i1, 0]
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isl_map *Schedule = Stmt.getSchedule();
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isl_map *Schedule = Stmt.getSchedule();
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assert(Schedule && "Schedules that contain extension nodes require "
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assert(Schedule &&
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"special handling.");
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"Schedules that contain extension nodes require special "
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"handling.");
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Schedule = isl_map_apply_domain(
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Schedule = isl_map_apply_domain(
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Schedule,
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Schedule,
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isl_map_reverse(isl_map_domain_map(isl_map_copy(accdom))));
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isl_map_reverse(isl_map_domain_map(isl_map_copy(accdom))));
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@ -163,8 +164,9 @@ static void collectInfo(Scop &S, isl_union_map **Read, isl_union_map **Write,
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accdom = tag(accdom, MA, Level);
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accdom = tag(accdom, MA, Level);
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if (Level > Dependences::AL_Statement) {
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if (Level > Dependences::AL_Statement) {
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auto *StmtScheduleMap = Stmt.getSchedule();
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auto *StmtScheduleMap = Stmt.getSchedule();
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assert(StmtScheduleMap && "Schedules that contain extension nodes "
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assert(StmtScheduleMap &&
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"require special handling.");
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"Schedules that contain extension nodes require special "
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"handling.");
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isl_map *Schedule = tag(StmtScheduleMap, MA, Level);
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isl_map *Schedule = tag(StmtScheduleMap, MA, Level);
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*StmtSchedule = isl_union_map_add_map(*StmtSchedule, Schedule);
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*StmtSchedule = isl_union_map_add_map(*StmtSchedule, Schedule);
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}
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}
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@ -274,8 +276,9 @@ void Dependences::addPrivatizationDependences() {
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*PrivMap = isl_union_map_apply_range(isl_union_map_copy(*Map),
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*PrivMap = isl_union_map_apply_range(isl_union_map_copy(*Map),
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isl_union_map_copy(TC_RED));
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isl_union_map_copy(TC_RED));
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*PrivMap = isl_union_map_union(
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*PrivMap = isl_union_map_union(
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*PrivMap, isl_union_map_apply_range(isl_union_map_copy(TC_RED),
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*PrivMap,
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isl_union_map_copy(*Map)));
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isl_union_map_apply_range(isl_union_map_copy(TC_RED),
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isl_union_map_copy(*Map)));
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*Map = isl_union_map_union(*Map, *PrivMap);
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*Map = isl_union_map_union(*Map, *PrivMap);
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}
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}
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@ -218,8 +218,9 @@ STATISTIC(NumProfScopsDepthFour,
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"Number of scops with maximal loop depth 4 (profitable scops only)");
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"Number of scops with maximal loop depth 4 (profitable scops only)");
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STATISTIC(NumProfScopsDepthFive,
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STATISTIC(NumProfScopsDepthFive,
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"Number of scops with maximal loop depth 5 (profitable scops only)");
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"Number of scops with maximal loop depth 5 (profitable scops only)");
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STATISTIC(NumProfScopsDepthLarger, "Number of scops with maximal loop depth 6 "
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STATISTIC(NumProfScopsDepthLarger,
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"and larger (profitable scops only)");
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"Number of scops with maximal loop depth 6 and larger "
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"(profitable scops only)");
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class DiagnosticScopFound : public DiagnosticInfo {
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class DiagnosticScopFound : public DiagnosticInfo {
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private:
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private:
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@ -60,8 +60,8 @@ llvm::Statistic RejectStatistics[] = {
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SCOP_STAT(LoopBound, "Uncomputable loop bounds"),
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SCOP_STAT(LoopBound, "Uncomputable loop bounds"),
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SCOP_STAT(LoopHasNoExit, "Loop without exit"),
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SCOP_STAT(LoopHasNoExit, "Loop without exit"),
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SCOP_STAT(FuncCall, "Function call with side effects"),
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SCOP_STAT(FuncCall, "Function call with side effects"),
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SCOP_STAT(NonSimpleMemoryAccess, "Compilated access semantics (volatile or "
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SCOP_STAT(NonSimpleMemoryAccess,
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"atomic)"),
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"Compilated access semantics (volatile or atomic)"),
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SCOP_STAT(Alias, "Base address aliasing"),
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SCOP_STAT(Alias, "Base address aliasing"),
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SCOP_STAT(Other, ""),
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SCOP_STAT(Other, ""),
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SCOP_STAT(IntToPtr, "Integer to pointer conversions"),
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SCOP_STAT(IntToPtr, "Integer to pointer conversions"),
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@ -309,8 +309,9 @@ bool ReportDifferentArrayElementSize::classof(const RejectReason *RR) {
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std::string ReportDifferentArrayElementSize::getEndUserMessage() const {
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std::string ReportDifferentArrayElementSize::getEndUserMessage() const {
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llvm::StringRef BaseName = BaseValue->getName();
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llvm::StringRef BaseName = BaseValue->getName();
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std::string Name = (BaseName.size() > 0) ? BaseName : "UNKNOWN";
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std::string Name = (BaseName.size() > 0) ? BaseName : "UNKNOWN";
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return "The array \"" + Name + "\" is accessed through elements that differ "
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return "The array \"" + Name +
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"in size";
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"\" is accessed through elements that differ "
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"in size";
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -2168,8 +2168,9 @@ static bool calculateMinMaxAccess(__isl_take isl_union_map *Accesses,
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isl_union_set *Locations = isl_union_map_range(Accesses);
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isl_union_set *Locations = isl_union_map_range(Accesses);
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Locations = isl_union_set_coalesce(Locations);
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Locations = isl_union_set_coalesce(Locations);
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Locations = isl_union_set_detect_equalities(Locations);
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Locations = isl_union_set_detect_equalities(Locations);
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bool Valid = (0 == isl_union_set_foreach_set(Locations, buildMinMaxAccess,
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bool Valid = (0 ==
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&MinMaxAccesses));
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isl_union_set_foreach_set(Locations, buildMinMaxAccess,
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&MinMaxAccesses));
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isl_union_set_free(Locations);
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isl_union_set_free(Locations);
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return Valid;
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return Valid;
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}
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}
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@ -3055,8 +3056,9 @@ bool Scop::buildAliasGroups(AliasAnalysis &AA) {
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// Bail out if the number of values we need to compare is too large.
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// Bail out if the number of values we need to compare is too large.
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// This is important as the number of comparisons grows quadratically with
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// This is important as the number of comparisons grows quadratically with
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// the number of values we need to compare.
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// the number of values we need to compare.
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if (!Valid || (MinMaxAccessesNonReadOnly.size() + ReadOnlyPairs.size() >
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if (!Valid ||
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RunTimeChecksMaxArraysPerGroup))
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(MinMaxAccessesNonReadOnly.size() + ReadOnlyPairs.size() >
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RunTimeChecksMaxArraysPerGroup))
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return false;
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return false;
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// Calculate minimal and maximal accesses for read only accesses.
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// Calculate minimal and maximal accesses for read only accesses.
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@ -476,9 +476,9 @@ void BlockGenerator::generateScalarStores(
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__isl_keep isl_id_to_ast_expr *NewAccesses) {
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__isl_keep isl_id_to_ast_expr *NewAccesses) {
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Loop *L = LI.getLoopFor(Stmt.getBasicBlock());
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Loop *L = LI.getLoopFor(Stmt.getBasicBlock());
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assert(Stmt.isBlockStmt() && "Region statements need to use the "
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assert(Stmt.isBlockStmt() &&
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"generateScalarStores() function in the "
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"Region statements need to use the generateScalarStores() function in "
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"RegionGenerator");
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"the RegionGenerator");
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for (MemoryAccess *MA : Stmt) {
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for (MemoryAccess *MA : Stmt) {
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if (MA->isOriginalArrayKind() || MA->isRead())
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if (MA->isOriginalArrayKind() || MA->isRead())
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@ -1060,8 +1060,9 @@ void VectorBlockGenerator::verifyNoScalarStores(ScopStmt &Stmt) {
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void VectorBlockGenerator::copyStmt(
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void VectorBlockGenerator::copyStmt(
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ScopStmt &Stmt, __isl_keep isl_id_to_ast_expr *NewAccesses) {
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ScopStmt &Stmt, __isl_keep isl_id_to_ast_expr *NewAccesses) {
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assert(Stmt.isBlockStmt() && "TODO: Only block statements can be copied by "
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assert(Stmt.isBlockStmt() &&
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"the vector block generator");
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"TODO: Only block statements can be copied by the vector block "
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"generator");
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BasicBlock *BB = Stmt.getBasicBlock();
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BasicBlock *BB = Stmt.getBasicBlock();
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BasicBlock *CopyBB = SplitBlock(Builder.GetInsertBlock(),
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BasicBlock *CopyBB = SplitBlock(Builder.GetInsertBlock(),
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@ -1237,8 +1238,9 @@ void RegionGenerator::copyStmt(ScopStmt &Stmt, LoopToScevMapT <S,
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BlockMap[R->getExit()] = ExitBBCopy;
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BlockMap[R->getExit()] = ExitBBCopy;
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BasicBlock *ExitDomBBCopy = BlockMap.lookup(findExitDominator(DT, R));
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BasicBlock *ExitDomBBCopy = BlockMap.lookup(findExitDominator(DT, R));
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assert(ExitDomBBCopy && "Common exit dominator must be within region; at "
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assert(ExitDomBBCopy &&
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"least the entry node must match");
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"Common exit dominator must be within region; at least the entry node "
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"must match");
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DT.changeImmediateDominator(ExitBBCopy, ExitDomBBCopy);
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DT.changeImmediateDominator(ExitBBCopy, ExitDomBBCopy);
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// As the block generator doesn't handle control flow we need to add the
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// As the block generator doesn't handle control flow we need to add the
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@ -458,8 +458,9 @@ void IslNodeBuilder::createForSequential(__isl_take isl_ast_node *For,
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CmpInst::Predicate Predicate;
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CmpInst::Predicate Predicate;
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bool Parallel;
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bool Parallel;
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Parallel = KnownParallel || (IslAstInfo::isParallel(For) &&
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Parallel =
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!IslAstInfo::isReductionParallel(For));
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KnownParallel ||
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(IslAstInfo::isParallel(For) && !IslAstInfo::isReductionParallel(For));
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Body = isl_ast_node_for_get_body(For);
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Body = isl_ast_node_for_get_body(For);
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@ -487,8 +487,9 @@ public:
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Values.insert(Unknown->getValue());
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Values.insert(Unknown->getValue());
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Instruction *Inst = dyn_cast<Instruction>(Unknown->getValue());
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Instruction *Inst = dyn_cast<Instruction>(Unknown->getValue());
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if (!Inst || (Inst->getOpcode() != Instruction::SRem &&
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if (!Inst ||
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Inst->getOpcode() != Instruction::SDiv))
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(Inst->getOpcode() != Instruction::SRem &&
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Inst->getOpcode() != Instruction::SDiv))
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return false;
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return false;
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auto *Dividend = SE.getSCEV(Inst->getOperand(1));
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auto *Dividend = SE.getSCEV(Inst->getOperand(1));
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@ -296,8 +296,9 @@ private:
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else
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else
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IP = RTCBB->getParent()->getEntryBlock().getTerminator();
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IP = RTCBB->getParent()->getEntryBlock().getTerminator();
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if (!Inst || (Inst->getOpcode() != Instruction::SRem &&
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if (!Inst ||
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Inst->getOpcode() != Instruction::SDiv))
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(Inst->getOpcode() != Instruction::SRem &&
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Inst->getOpcode() != Instruction::SDiv))
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return visitGenericInst(E, Inst, IP);
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return visitGenericInst(E, Inst, IP);
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const SCEV *LHSScev = SE.getSCEV(Inst->getOperand(0));
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const SCEV *LHSScev = SE.getSCEV(Inst->getOperand(0));
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@ -174,10 +174,12 @@ static cl::opt<int> FirstLevelDefaultTileSize(
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" --polly-tile-sizes)"),
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" --polly-tile-sizes)"),
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cl::Hidden, cl::init(32), cl::ZeroOrMore, cl::cat(PollyCategory));
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cl::Hidden, cl::init(32), cl::ZeroOrMore, cl::cat(PollyCategory));
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static cl::list<int> FirstLevelTileSizes(
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static cl::list<int>
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"polly-tile-sizes", cl::desc("A tile size for each loop dimension, filled "
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FirstLevelTileSizes("polly-tile-sizes",
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cl::desc("A tile size for each loop dimension, filled "
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"with --polly-default-tile-size"),
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"with --polly-default-tile-size"),
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cl::Hidden, cl::ZeroOrMore, cl::CommaSeparated, cl::cat(PollyCategory));
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cl::Hidden, cl::ZeroOrMore, cl::CommaSeparated,
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cl::cat(PollyCategory));
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static cl::opt<bool>
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static cl::opt<bool>
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SecondLevelTiling("polly-2nd-level-tiling",
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SecondLevelTiling("polly-2nd-level-tiling",
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@ -1064,8 +1066,9 @@ bool ScheduleTreeOptimizer::isProfitableSchedule(
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return true;
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return true;
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auto *NewScheduleMap = isl_schedule_get_map(NewSchedule);
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auto *NewScheduleMap = isl_schedule_get_map(NewSchedule);
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isl_union_map *OldSchedule = S.getSchedule();
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isl_union_map *OldSchedule = S.getSchedule();
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assert(OldSchedule && "Only IslScheduleOptimizer can insert extension nodes "
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assert(OldSchedule &&
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"that make Scop::getSchedule() return nullptr.");
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"Only IslScheduleOptimizer can insert extension nodes "
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"that make Scop::getSchedule() return nullptr.");
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bool changed = !isl_union_map_is_equal(OldSchedule, NewScheduleMap);
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bool changed = !isl_union_map_is_equal(OldSchedule, NewScheduleMap);
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isl_union_map_free(OldSchedule);
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isl_union_map_free(OldSchedule);
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isl_union_map_free(NewScheduleMap);
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isl_union_map_free(NewScheduleMap);
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@ -303,8 +303,9 @@ TEST(Isl, Foreach) {
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EXPECT_EQ(isl_stat_error,
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EXPECT_EQ(isl_stat_error,
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foreachEltWithBreak(
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foreachEltWithBreak(
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TestMap, [&](IslPtr<isl_basic_map> BMap) -> isl_stat {
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TestMap, [&](IslPtr<isl_basic_map> BMap) -> isl_stat {
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EXPECT_EQ(isl_bool_true, isl_basic_map_is_equal(
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EXPECT_EQ(
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BMap.keep(), TestBMap.keep()));
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isl_bool_true,
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isl_basic_map_is_equal(BMap.keep(), TestBMap.keep()));
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NumBMaps++;
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NumBMaps++;
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return isl_stat_error;
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return isl_stat_error;
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}));
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}));
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@ -328,13 +329,15 @@ TEST(Isl, Foreach) {
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auto TestPwAff =
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auto TestPwAff =
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give(isl_pw_aff_val_on_domain(TestSet.copy(), isl_val_zero(Ctx.get())));
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give(isl_pw_aff_val_on_domain(TestSet.copy(), isl_val_zero(Ctx.get())));
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auto NumPieces = 0;
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auto NumPieces = 0;
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foreachPieceWithBreak(TestPwAff, [&](IslPtr<isl_set> Domain,
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foreachPieceWithBreak(
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IslPtr<isl_aff> Aff) -> isl_stat {
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TestPwAff,
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EXPECT_EQ(isl_bool_true, isl_set_is_equal(Domain.keep(), TestSet.keep()));
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[&](IslPtr<isl_set> Domain, IslPtr<isl_aff> Aff) -> isl_stat {
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EXPECT_EQ(isl_bool_true, isl_aff_is_cst(Aff.keep()));
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EXPECT_EQ(isl_bool_true,
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NumPieces++;
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isl_set_is_equal(Domain.keep(), TestSet.keep()));
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return isl_stat_error;
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EXPECT_EQ(isl_bool_true, isl_aff_is_cst(Aff.keep()));
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});
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NumPieces++;
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return isl_stat_error;
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});
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EXPECT_EQ(1, NumPieces);
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EXPECT_EQ(1, NumPieces);
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}
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}
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}
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}
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