diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index 24d2eef07a05..4a72e76997b4 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -344,7 +344,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
   
   for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
     const AsmWriterInst *Inst = getAsmWriterInstByID(i);
-    if (Inst == 0) continue;  // PHI, INLINEASM, etc.
+    if (Inst == 0) continue;  // PHI, INLINEASM, LABEL, etc.
     
     std::string Command;
     if (Inst->Operands.empty())
@@ -621,6 +621,9 @@ void AsmWriterEmitter::run(std::ostream &O) {
   O << "  if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
     << "    printInlineAsm(MI);\n"
     << "    return true;\n"
+    << "  } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n"
+    << "    printLabel(MI);\n"
+    << "    return true;\n"
     << "  }\n\n";
   
   O << "  // Emit the opcode for the instruction.\n"
diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp
index 861c6b0e34c4..300a1009a735 100644
--- a/llvm/utils/TableGen/CodeEmitterGen.cpp
+++ b/llvm/utils/TableGen/CodeEmitterGen.cpp
@@ -24,7 +24,9 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
   for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
        I != E; ++I) {
     Record *R = *I;
-    if (R->getName() == "PHI" || R->getName() == "INLINEASM") continue;
+    if (R->getName() == "PHI" ||
+        R->getName() == "INLINEASM" ||
+        R->getName() == "LABEL") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -93,7 +95,9 @@ void CodeEmitterGen::run(std::ostream &o) {
     
     if (IN != NumberedInstructions.begin()) o << ",\n";
     
-    if (R->getName() == "PHI" || R->getName() == "INLINEASM") {
+    if (R->getName() == "PHI" ||
+        R->getName() == "INLINEASM" ||
+        R->getName() == "LABEL") {
       o << "    0U";
       continue;
     }
@@ -121,7 +125,9 @@ void CodeEmitterGen::run(std::ostream &o) {
     const std::string &InstName = R->getName();
     std::string Case("");
     
-    if (InstName == "PHI" || InstName == "INLINEASM") continue;
+    if (InstName == "PHI" ||
+        InstName == "INLINEASM" ||
+        InstName == "LABEL") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();
diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp
index e6ac2c3573ee..688ed0f9248b 100644
--- a/llvm/utils/TableGen/CodeGenTarget.cpp
+++ b/llvm/utils/TableGen/CodeGenTarget.cpp
@@ -258,11 +258,18 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
   if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
   const CodeGenInstruction *INLINEASM = &I->second;
   
+  I = getInstructions().find("LABEL");
+  if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
+  const CodeGenInstruction *LABEL = &I->second;
+  
   // Print out the rest of the instructions now.
   NumberedInstructions.push_back(PHI);
   NumberedInstructions.push_back(INLINEASM);
+  NumberedInstructions.push_back(LABEL);
   for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
-    if (&II->second != PHI &&&II->second != INLINEASM)
+    if (&II->second != PHI &&
+        &II->second != INLINEASM &&
+        &II->second != LABEL)
       NumberedInstructions.push_back(&II->second);
 }
 
diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp
index fbd0a9660ba5..6c9825de0f6e 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -3688,6 +3688,14 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
      << "  return New.Val;\n"
      << "}\n\n";
   
+  OS << "SDNode *Select_LABEL(const SDOperand &N) {\n"
+     << "  SDOperand Chain = N.getOperand(0);\n"
+     << "  SDOperand N1 = N.getOperand(1);\n"
+     << "  AddToISelQueue(Chain);\n"
+     << "  return CurDAG->getTargetNode(TargetInstrInfo::LABEL,\n"
+     << "                               MVT::Other, N1, Chain);\n"
+     << "}\n\n";
+
   OS << "// The main instruction selector code.\n"
      << "SDNode *SelectCode(SDOperand N) {\n"
      << "  if (N.getOpcode() >= ISD::BUILTIN_OP_END &&\n"
@@ -3722,7 +3730,8 @@ void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
      << "      AddToISelQueue(N.getOperand(i));\n"
      << "    return NULL;\n"
      << "  }\n"
-     << "  case ISD::INLINEASM:  return Select_INLINEASM(N);\n";
+     << "  case ISD::INLINEASM: return Select_INLINEASM(N);\n"
+     << "  case ISD::LABEL: return Select_LABEL(N);\n";
 
     
   // Loop over all of the case statements, emiting a call to each method we
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 3d4da0ee288d..7ea85980da90 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -315,7 +315,9 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
 
   if (RV == 0 || RV->getValue() == 0) {
     // This isn't an error if this is a builtin instruction.
-    if (R->getName() != "PHI" && R->getName() != "INLINEASM")
+    if (R->getName() != "PHI" &&
+        R->getName() != "INLINEASM" &&
+        R->getName() != "LABEL")
       throw R->getName() + " doesn't have a field named '" + 
             Val->getValue() + "'!";
     return;