forked from OSchip/llvm-project
libclc: Add clspv target to libclc
Add clspv as a new target for libclc. clspv is an open-source compiler that compiles OpenCL C to Vulkan SPIR-V. Compiles for the spir target. The clspv target differs from the the spirv target in the following ways: * fma is modified to use uint2 instead of ulong for mantissas. This results in lower performance fma, but provides a implementation that can be used on more Vulkan devices where 64-bit integer support is less common. * Use of a software implementation of nextafter because the generic implementation depends on nextafter being a defined builtin function for which clspv has no definition. * Full optimization of the library (-O3) and no conversion to SPIR-V This library is close to what would be produced by running opt -O3 < builtins.opt.spirv-mesa3d-.bc > builtins.opt.clspv--.bc and continuing the build from that point. Reviewer: jvesely Differential Revision: https://reviews.llvm.org/D94013
This commit is contained in:
Alan Baker
Jan Vesely
parent
0106370bee
commit
21427b8eb8
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@ -7,6 +7,7 @@ set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS
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amdgcn/lib/SOURCES;
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amdgcn-mesa3d/lib/SOURCES;
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amdgpu/lib/SOURCES;
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clspv/lib/SOURCES;
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generic/lib/SOURCES;
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ptx/lib/SOURCES;
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ptx-nvidiacl/lib/SOURCES;
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@ -19,6 +20,7 @@ set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS
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set( LIBCLC_TARGETS_ALL
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amdgcn--
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amdgcn--amdhsa
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clspv--
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r600--
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nvptx--
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nvptx64--
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@ -145,6 +147,7 @@ set( r600--_devices cedar cypress barts cayman )
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set( amdgcn--_devices tahiti )
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set( amdgcn-mesa-mesa3d_devices ${amdgcn--_devices} )
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set( amdgcn--amdhsa_devices none )
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set( clspv--_devices none )
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set( nvptx--_devices none )
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set( nvptx64--_devices none )
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set( nvptx--nvidiacl_devices none )
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@ -203,7 +206,7 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} )
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set( dirs )
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if ( NOT ${ARCH} STREQUAL spirv AND NOT ${ARCH} STREQUAL spirv64 )
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if ( NOT ${ARCH} STREQUAL spirv AND NOT ${ARCH} STREQUAL spirv64 AND NOT ${ARCH} STREQUAL clspv )
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LIST( APPEND dirs generic )
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endif()
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@ -234,7 +237,7 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} )
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# Add the generated convert.cl here to prevent adding
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# the one listed in SOURCES
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if( NOT ${ARCH} STREQUAL "spirv" AND NOT ${ARCH} STREQUAL "spirv64" )
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if( NOT ${ARCH} STREQUAL "spirv" AND NOT ${ARCH} STREQUAL "spirv64" AND NOT ${ARCH} STREQUAL "clspv" )
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set( rel_files convert.cl )
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set( objects convert.cl )
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if( NOT ENABLE_RUNTIME_SUBNORMAL )
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@ -284,6 +287,10 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} )
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set( build_flags -O0 -finline-hint-functions )
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set( opt_flags )
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set( spvflags --spirv-max-version=1.1 )
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elseif( ${ARCH} STREQUAL "clspv" )
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set( t "spir--" )
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set( build_flags )
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set( opt_flags -O3 )
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else()
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set( build_flags )
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set( opt_flags -O3 )
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@ -0,0 +1,48 @@
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subnormal_config.cl
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../../generic/lib/geometric/distance.cl
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../../generic/lib/geometric/length.cl
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math/fma.cl
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math/nextafter.cl
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../../generic/lib/math/acosh.cl
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../../generic/lib/math/asinh.cl
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../../generic/lib/math/atan.cl
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../../generic/lib/math/atan2.cl
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../../generic/lib/math/atan2pi.cl
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../../generic/lib/math/atanh.cl
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../../generic/lib/math/atanpi.cl
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../../generic/lib/math/cbrt.cl
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../../generic/lib/math/clc_fmod.cl
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../../generic/lib/math/clc_hypot.cl
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../../generic/lib/math/clc_ldexp.cl
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../../generic/lib/math/clc_nextafter.cl
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../../generic/lib/math/clc_remainder.cl
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../../generic/lib/math/clc_remquo.cl
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../../generic/lib/math/clc_rootn.cl
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../../generic/lib/math/clc_sqrt.cl
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../../generic/lib/math/clc_tan.cl
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../../generic/lib/math/erf.cl
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../../generic/lib/math/erfc.cl
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../../generic/lib/math/fmod.cl
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../../generic/lib/math/fract.cl
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../../generic/lib/math/frexp.cl
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../../generic/lib/math/half_divide.cl
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../../generic/lib/math/half_recip.cl
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../../generic/lib/math/half_sqrt.cl
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../../generic/lib/math/hypot.cl
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../../generic/lib/math/ilogb.cl
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../../generic/lib/math/ldexp.cl
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../../generic/lib/math/lgamma.cl
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../../generic/lib/math/lgamma_r.cl
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../../generic/lib/math/logb.cl
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../../generic/lib/math/maxmag.cl
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../../generic/lib/math/minmag.cl
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../../generic/lib/math/modf.cl
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../../generic/lib/math/nan.cl
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../../generic/lib/math/remainder.cl
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../../generic/lib/math/remquo.cl
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../../generic/lib/math/rootn.cl
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../../generic/lib/math/rsqrt.cl
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../../generic/lib/math/sqrt.cl
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../../generic/lib/math/tables.cl
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../../generic/lib/math/tanh.cl
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../../generic/lib/math/tgamma.cl
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@ -0,0 +1,256 @@
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/*
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* Copyright (c) 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// This version is derived from the generic fma software implementation
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// (__clc_sw_fma), but avoids the use of ulong in favor of uint2. The logic has
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// been updated as appropriate.
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#include <clc/clc.h>
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#include "../../../generic/lib/clcmacro.h"
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#include "../../../generic/lib/math/math.h"
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struct fp {
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uint2 mantissa;
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int exponent;
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uint sign;
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};
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_CLC_DEF _CLC_OVERLOAD float fma(float a, float b, float c) {
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/* special cases */
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if (isnan(a) || isnan(b) || isnan(c) || isinf(a) || isinf(b)) {
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return mad(a, b, c);
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}
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/* If only c is inf, and both a,b are regular numbers, the result is c*/
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if (isinf(c)) {
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return c;
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}
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a = __clc_flush_denormal_if_not_supported(a);
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b = __clc_flush_denormal_if_not_supported(b);
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c = __clc_flush_denormal_if_not_supported(c);
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if (a == 0.0f || b == 0.0f) {
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return c;
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}
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if (c == 0) {
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return a * b;
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}
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struct fp st_a, st_b, st_c;
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st_a.exponent = a == .0f ? 0 : ((as_uint(a) & 0x7f800000) >> 23) - 127;
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st_b.exponent = b == .0f ? 0 : ((as_uint(b) & 0x7f800000) >> 23) - 127;
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st_c.exponent = c == .0f ? 0 : ((as_uint(c) & 0x7f800000) >> 23) - 127;
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st_a.mantissa.lo = a == .0f ? 0 : (as_uint(a) & 0x7fffff) | 0x800000;
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st_b.mantissa.lo = b == .0f ? 0 : (as_uint(b) & 0x7fffff) | 0x800000;
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st_c.mantissa.lo = c == .0f ? 0 : (as_uint(c) & 0x7fffff) | 0x800000;
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st_a.mantissa.hi = 0;
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st_b.mantissa.hi = 0;
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st_c.mantissa.hi = 0;
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st_a.sign = as_uint(a) & 0x80000000;
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st_b.sign = as_uint(b) & 0x80000000;
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st_c.sign = as_uint(c) & 0x80000000;
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// Multiplication.
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// Move the product to the highest bits to maximize precision
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// mantissa is 24 bits => product is 48 bits, 2bits non-fraction.
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// Add one bit for future addition overflow,
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// add another bit to detect subtraction underflow
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struct fp st_mul;
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st_mul.sign = st_a.sign ^ st_b.sign;
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st_mul.mantissa.hi = mul_hi(st_a.mantissa.lo, st_b.mantissa.lo);
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st_mul.mantissa.lo = st_a.mantissa.lo * st_b.mantissa.lo;
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uint upper_14bits = (st_mul.mantissa.lo >> 18) & 0x3fff;
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st_mul.mantissa.lo <<= 14;
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st_mul.mantissa.hi <<= 14;
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st_mul.mantissa.hi |= upper_14bits;
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st_mul.exponent = (st_mul.mantissa.lo != 0 || st_mul.mantissa.hi != 0)
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? st_a.exponent + st_b.exponent
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: 0;
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// Mantissa is 23 fractional bits, shift it the same way as product mantissa
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#define C_ADJUST 37ul
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// both exponents are bias adjusted
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int exp_diff = st_mul.exponent - st_c.exponent;
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uint abs_exp_diff = abs(exp_diff);
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st_c.mantissa.hi = (st_c.mantissa.lo << 5);
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st_c.mantissa.lo = 0;
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uint2 cutoff_bits = (uint2)(0, 0);
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uint2 cutoff_mask = (uint2)(0, 0);
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if (abs_exp_diff < 32) {
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cutoff_mask.lo = (1u << abs(exp_diff)) - 1u;
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} else if (abs_exp_diff < 64) {
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cutoff_mask.lo = 0xffffffff;
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uint remaining = abs_exp_diff - 32;
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cutoff_mask.hi = (1u << remaining) - 1u;
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} else {
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cutoff_mask = (uint2)(0, 0);
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}
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uint2 tmp = (exp_diff > 0) ? st_c.mantissa : st_mul.mantissa;
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if (abs_exp_diff > 0) {
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cutoff_bits = abs_exp_diff >= 64 ? tmp : (tmp & cutoff_mask);
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if (abs_exp_diff < 32) {
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// shift some of the hi bits into the shifted lo bits.
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uint shift_mask = (1u << abs_exp_diff) - 1;
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uint upper_saved_bits = tmp.hi & shift_mask;
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upper_saved_bits = upper_saved_bits << (32 - abs_exp_diff);
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tmp.hi >>= abs_exp_diff;
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tmp.lo >>= abs_exp_diff;
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tmp.lo |= upper_saved_bits;
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} else if (abs_exp_diff < 64) {
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tmp.lo = (tmp.hi >> (abs_exp_diff - 32));
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tmp.hi = 0;
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} else {
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tmp = (uint2)(0, 0);
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}
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}
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if (exp_diff > 0)
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st_c.mantissa = tmp;
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else
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st_mul.mantissa = tmp;
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struct fp st_fma;
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st_fma.sign = st_mul.sign;
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st_fma.exponent = max(st_mul.exponent, st_c.exponent);
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st_fma.mantissa = (uint2)(0, 0);
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if (st_c.sign == st_mul.sign) {
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uint carry = (hadd(st_mul.mantissa.lo, st_c.mantissa.lo) >> 31) & 0x1;
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st_fma.mantissa = st_mul.mantissa + st_c.mantissa;
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st_fma.mantissa.hi += carry;
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} else {
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// cutoff bits borrow one
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uint cutoff_borrow = ((cutoff_bits.lo != 0 || cutoff_bits.hi != 0) &&
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(st_mul.exponent > st_c.exponent))
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? 1
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: 0;
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uint borrow = 0;
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if (st_c.mantissa.lo > st_mul.mantissa.lo) {
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borrow = 1;
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} else if (st_c.mantissa.lo == UINT_MAX && cutoff_borrow == 1) {
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borrow = 1;
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} else if ((st_c.mantissa.lo + cutoff_borrow) > st_mul.mantissa.lo) {
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borrow = 1;
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}
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st_fma.mantissa.lo = st_mul.mantissa.lo - st_c.mantissa.lo - cutoff_borrow;
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st_fma.mantissa.hi = st_mul.mantissa.hi - st_c.mantissa.hi - borrow;
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}
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// underflow: st_c.sign != st_mul.sign, and magnitude switches the sign
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if (st_fma.mantissa.hi > INT_MAX) {
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st_fma.mantissa = ~st_fma.mantissa;
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uint carry = (hadd(st_fma.mantissa.lo, 1u) >> 31) & 0x1;
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st_fma.mantissa.lo += 1;
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st_fma.mantissa.hi += carry;
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st_fma.sign = st_mul.sign ^ 0x80000000;
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}
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// detect overflow/underflow
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uint leading_zeroes = clz(st_fma.mantissa.hi);
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if (leading_zeroes == 32) {
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leading_zeroes += clz(st_fma.mantissa.lo);
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}
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int overflow_bits = 3 - leading_zeroes;
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// adjust exponent
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st_fma.exponent += overflow_bits;
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// handle underflow
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if (overflow_bits < 0) {
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uint shift = -overflow_bits;
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if (shift < 32) {
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uint shift_mask = (1u << shift) - 1;
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uint saved_lo_bits = (st_fma.mantissa.lo >> (32 - shift)) & shift_mask;
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st_fma.mantissa.lo <<= shift;
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st_fma.mantissa.hi <<= shift;
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st_fma.mantissa.hi |= saved_lo_bits;
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} else if (shift < 64) {
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st_fma.mantissa.hi = (st_fma.mantissa.lo << (64 - shift));
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st_fma.mantissa.lo = 0;
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} else {
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st_fma.mantissa = (uint2)(0, 0);
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}
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overflow_bits = 0;
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}
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// rounding
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// overflow_bits is now in the range of [0, 3] making the shift greater than
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// 32 bits.
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uint2 trunc_mask;
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uint trunc_shift = C_ADJUST + overflow_bits - 32;
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trunc_mask.hi = (1u << trunc_shift) - 1;
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trunc_mask.lo = UINT_MAX;
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uint2 trunc_bits = st_fma.mantissa & trunc_mask;
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trunc_bits.lo |= (cutoff_bits.hi != 0 || cutoff_bits.lo != 0) ? 1 : 0;
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uint2 last_bit;
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last_bit.lo = 0;
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last_bit.hi = st_fma.mantissa.hi & (1u << trunc_shift);
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uint grs_shift = C_ADJUST - 3 + overflow_bits - 32;
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uint2 grs_bits;
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grs_bits.lo = 0;
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grs_bits.hi = 0x4u << grs_shift;
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// round to nearest even
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if ((trunc_bits.hi > grs_bits.hi ||
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(trunc_bits.hi == grs_bits.hi && trunc_bits.lo > grs_bits.lo)) ||
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(trunc_bits.hi == grs_bits.hi && trunc_bits.lo == grs_bits.lo &&
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last_bit.hi != 0)) {
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uint shift = C_ADJUST + overflow_bits - 32;
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st_fma.mantissa.hi += 1u << shift;
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}
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// Shift mantissa back to bit 23
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st_fma.mantissa.lo = (st_fma.mantissa.hi >> (C_ADJUST + overflow_bits - 32));
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st_fma.mantissa.hi = 0;
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|
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// Detect rounding overflow
|
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if (st_fma.mantissa.lo > 0xffffff) {
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++st_fma.exponent;
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st_fma.mantissa.lo >>= 1;
|
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}
|
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|
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if (st_fma.mantissa.lo == 0) {
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return 0.0f;
|
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}
|
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|
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// Flating point range limit
|
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if (st_fma.exponent > 127) {
|
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return as_float(as_uint(INFINITY) | st_fma.sign);
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}
|
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|
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// Flush denormals
|
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if (st_fma.exponent <= -127) {
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return as_float(st_fma.sign);
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}
|
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|
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return as_float(st_fma.sign | ((st_fma.exponent + 127) << 23) |
|
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((uint)st_fma.mantissa.lo & 0x7fffff));
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||||
}
|
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_CLC_TERNARY_VECTORIZE(_CLC_DEF _CLC_OVERLOAD, float, fma, float, float, float)
|
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|
|
@ -0,0 +1,5 @@
|
|||
#include <clc/clc.h>
|
||||
#include <math/clc_nextafter.h>
|
||||
|
||||
#define __CLC_BODY <nextafter.inc>
|
||||
#include <clc/math/gentype.inc>
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
_CLC_DEF _CLC_OVERLOAD __CLC_GENTYPE nextafter(__CLC_GENTYPE x, __CLC_GENTYPE y) {
|
||||
return __clc_nextafter(x, y);
|
||||
}
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2015 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <clc/clc.h>
|
||||
|
||||
#include "config.h"
|
||||
|
||||
_CLC_DEF bool __clc_fp16_subnormals_supported() { return false; }
|
||||
|
||||
_CLC_DEF bool __clc_fp32_subnormals_supported() { return false; }
|
||||
|
||||
_CLC_DEF bool __clc_fp64_subnormals_supported() { return false; }
|
||||
Loading…
Reference in New Issue