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[RISCV] Add vcsr CSR name for V extension. 

Reviewed By: frasercrmck, kito-cheng

Differential Revision: https://reviews.llvm.org/D112342
This commit is contained in:
Craig Topper 2021-10-25 08:49:58 -07:00
parent 7b102fcc91
commit 210b586a85
2 changed files with 15 additions and 0 deletions
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1
llvm/lib/Target/RISCV/RISCVSystemOperands.td
View File

@ -385,6 +385,7 @@ def : SysReg<"dscratch1", 0x7B3>;
def : SysReg<"vstart", 0x008>; def : SysReg<"vstart", 0x008>;
def : SysReg<"vxsat", 0x009>; def : SysReg<"vxsat", 0x009>;
def : SysReg<"vxrm", 0x00A>; def : SysReg<"vxrm", 0x00A>;
def : SysReg<"vcsr", 0x00F>;
def : SysReg<"vl", 0xC20>; def : SysReg<"vl", 0xC20>;
def : SysReg<"vtype", 0xC21>; def : SysReg<"vtype", 0xC21>;
def : SysReg<"vlenb", 0xC22>; def : SysReg<"vlenb", 0xC22>;

14
llvm/test/MC/RISCV/rvv-user-csr-names.s
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@ -56,6 +56,20 @@ csrrs t1, vxrm, zero
# uimm12 # uimm12
csrrs t2, 0x00a, zero csrrs t2, 0x00a, zero
# vcsr
# name
# CHECK-INST: csrrs t1, vcsr, zero
# CHECK-ENC: encoding: [0x73,0x23,0xf0,0x00]
# CHECK-INST-ALIAS: csrr t1, vcsr
# uimm12
# CHECK-INST: csrrs t2, vcsr, zero
# CHECK-ENC: encoding: [0xf3,0x23,0xf0,0x00]
# CHECK-INST-ALIAS: csrr t2, vcsr
# name
csrrs t1, vcsr, zero
# uimm12
csrrs t2, 0x00f, zero
# vl # vl
# name # name
# CHECK-INST: csrrs t1, vl, zero # CHECK-INST: csrrs t1, vl, zero