forked from OSchip/llvm-project
[PhaseOrdering] Remove RUN lines for legacy PM (NFC)
This commit is contained in:
Nikita Popov
parent
b1620d40d0
commit
20cf4f8af8
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@ -1,6 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -O3 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefixes=ALL
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s --check-prefixes=ALL
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@ -8,15 +7,15 @@ target triple = "x86_64-unknown-linux-gnu"
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; PR51092: SimplifyCFG might produce duplicate PHI's/select's.
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; We need to deduplicate them so that further transformations are possible.
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define dso_local void @foo(i32* %in, i64 %lo, i64 %hi, i32 %ishi) #0 {
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; ALL-LABEL: @foo(
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; ALL-NEXT: entry:
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; ALL-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[ISHI:%.*]], 0
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; ALL-NEXT: [[LO_HI:%.*]] = select i1 [[TOBOOL_NOT]], i64 [[LO:%.*]], i64 [[HI:%.*]]
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; ALL-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[LO_HI]]
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; ALL-NEXT: [[ARRAYVAL2:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
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; ALL-NEXT: [[INC2:%.*]] = add nsw i32 [[ARRAYVAL2]], 1
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; ALL-NEXT: store i32 [[INC2]], i32* [[ARRAYIDX1]], align 4
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; ALL-NEXT: ret void
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[ISHI:%.*]], 0
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; CHECK-NEXT: [[LO_HI:%.*]] = select i1 [[TOBOOL_NOT]], i64 [[LO:%.*]], i64 [[HI:%.*]]
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[IN:%.*]], i64 [[LO_HI]]
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; CHECK-NEXT: [[ARRAYVAL2:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4
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; CHECK-NEXT: [[INC2:%.*]] = add nsw i32 [[ARRAYVAL2]], 1
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; CHECK-NEXT: store i32 [[INC2]], i32* [[ARRAYIDX1]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%in.addr = alloca i32*, align 8
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@ -1,10 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
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; RUN: opt -O1 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O1 %s
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; RUN: opt -O2 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O2 %s
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; RUN: opt -O3 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O3 %s
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; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=NEWPM_O1 %s
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; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=NEWPM_O2 %s
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=NEWPM_O3 %s
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; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=O1 %s
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; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=O2 %s
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; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=O3 %s
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@ -17,267 +14,137 @@ target triple = "x86_64-unknown-linux-gnu"
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$_ZNSt6vectorIiSaIiEEixEm = comdat any
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define dso_local void @_Z7computeRSt6vectorIiSaIiEEy(%"class.std::vector"* noundef nonnull align 8 dereferenceable(24) %data, i64 noundef %numElems) {
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; OLDPM_O1-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
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; OLDPM_O1-SAME: (%"class.std::vector"* noundef nonnull align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr {
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; OLDPM_O1-NEXT: entry:
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; OLDPM_O1-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
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; OLDPM_O1-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
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; OLDPM_O1: for.cond1.preheader:
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; OLDPM_O1-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
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; OLDPM_O1-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4:%.*]]
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; OLDPM_O1: for.cond.cleanup:
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; OLDPM_O1-NEXT: ret void
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; OLDPM_O1: for.cond.cleanup3:
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; OLDPM_O1-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
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; OLDPM_O1-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
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; OLDPM_O1-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP0:![0-9]+]]
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; OLDPM_O1: for.body4:
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; OLDPM_O1-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ 0, [[FOR_COND1_PREHEADER]] ]
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; OLDPM_O1-NEXT: [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) i32* @_ZNSt6vectorIiSaIiEEixEm(%"class.std::vector"* noundef nonnull align 8 dereferenceable(24) [[DATA]], i64 noundef [[J_07]])
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; OLDPM_O1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4, !tbaa [[TBAA2:![0-9]+]]
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; OLDPM_O1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
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; OLDPM_O1-NEXT: store i32 [[INC]], i32* [[CALL]], align 4, !tbaa [[TBAA2]]
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; OLDPM_O1-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
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; OLDPM_O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
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; OLDPM_O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP6:![0-9]+]]
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; O1-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
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; O1-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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; O1-NEXT: entry:
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; O1-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
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; O1-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
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; O1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
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; O1-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
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; O1: for.cond1.preheader:
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; O1-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
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; O1-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4:%.*]]
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; O1: for.cond.cleanup:
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; O1-NEXT: ret void
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; O1: for.cond.cleanup3:
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; O1-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
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; O1-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
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; O1-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP0:![0-9]+]]
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; O1: for.body4:
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; O1-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ 0, [[FOR_COND1_PREHEADER]] ]
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; O1-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07]]
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; O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA2:![0-9]+]]
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; O1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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; O1-NEXT: store i32 [[INC]], i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA2]]
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; O1-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
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; O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
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; O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP6:![0-9]+]]
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;
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; OLDPM_O2-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
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; OLDPM_O2-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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; OLDPM_O2-NEXT: entry:
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; OLDPM_O2-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
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; OLDPM_O2-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
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; OLDPM_O2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
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; OLDPM_O2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
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; OLDPM_O2-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
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; OLDPM_O2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
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; OLDPM_O2-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
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; OLDPM_O2: for.cond1.preheader:
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; OLDPM_O2-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
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; OLDPM_O2-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER:%.*]]
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; OLDPM_O2: for.body4.preheader:
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; OLDPM_O2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_PREHEADER11:%.*]], label [[VECTOR_BODY:%.*]]
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; OLDPM_O2: vector.body:
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; OLDPM_O2-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_BODY4_PREHEADER]] ]
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; OLDPM_O2-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
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; OLDPM_O2-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
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; OLDPM_O2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
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; OLDPM_O2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
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; OLDPM_O2-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
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; OLDPM_O2-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
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; OLDPM_O2-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
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; OLDPM_O2-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD10]], <i32 1, i32 1, i32 1, i32 1>
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; OLDPM_O2-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
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; OLDPM_O2-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
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; OLDPM_O2-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
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; OLDPM_O2-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
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; OLDPM_O2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; OLDPM_O2-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; OLDPM_O2-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; OLDPM_O2: middle.block:
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; OLDPM_O2-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER11]]
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; OLDPM_O2: for.body4.preheader11:
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; OLDPM_O2-NEXT: [[J_07_PH:%.*]] = phi i64 [ 0, [[FOR_BODY4_PREHEADER]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
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; OLDPM_O2-NEXT: br label [[FOR_BODY4:%.*]]
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; OLDPM_O2: for.cond.cleanup:
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; OLDPM_O2-NEXT: ret void
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; OLDPM_O2: for.cond.cleanup3:
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; OLDPM_O2-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
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; OLDPM_O2-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
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; OLDPM_O2-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP7:![0-9]+]]
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; OLDPM_O2: for.body4:
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; OLDPM_O2-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ [[J_07_PH]], [[FOR_BODY4_PREHEADER11]] ]
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; OLDPM_O2-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07]]
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; OLDPM_O2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
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; OLDPM_O2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1
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; OLDPM_O2-NEXT: store i32 [[INC]], i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
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; OLDPM_O2-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
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; OLDPM_O2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
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; OLDPM_O2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP8:![0-9]+]]
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; O2-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
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; O2-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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; O2-NEXT: entry:
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; O2-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
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; O2-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
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; O2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
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; O2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
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; O2-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
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; O2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
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; O2-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
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; O2: for.cond1.preheader:
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; O2-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
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; O2-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER:%.*]]
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; O2: for.body4.preheader:
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; O2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_PREHEADER11:%.*]], label [[VECTOR_BODY:%.*]]
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; O2: vector.body:
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; O2-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_BODY4_PREHEADER]] ]
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; O2-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
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; O2-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
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; O2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
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; O2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
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; O2-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
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; O2-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
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; O2-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
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; O2-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD10]], <i32 1, i32 1, i32 1, i32 1>
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; O2-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
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; O2-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
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; O2-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
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; O2-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
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; O2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; O2-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; O2-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; O2: middle.block:
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; O2-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER11]]
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; O2: for.body4.preheader11:
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; O2-NEXT: [[J_07_PH:%.*]] = phi i64 [ 0, [[FOR_BODY4_PREHEADER]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
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; O2-NEXT: br label [[FOR_BODY4:%.*]]
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; O2: for.cond.cleanup:
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; O2-NEXT: ret void
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; O2: for.cond.cleanup3:
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; O2-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
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; O2-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
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; O2-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP7:![0-9]+]]
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; O2: for.body4:
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; O2-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ [[J_07_PH]], [[FOR_BODY4_PREHEADER11]] ]
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; O2-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07]]
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; O2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
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; O2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1
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; O2-NEXT: store i32 [[INC]], i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
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; O2-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
|
||||
; O2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
|
||||
; O2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP8:![0-9]+]]
|
||||
;
|
||||
; OLDPM_O3-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
|
||||
; OLDPM_O3-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; OLDPM_O3-NEXT: entry:
|
||||
; OLDPM_O3-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
|
||||
; OLDPM_O3-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; OLDPM_O3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
|
||||
; OLDPM_O3-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]]
|
||||
; OLDPM_O3: for.cond1.preheader.us.preheader:
|
||||
; OLDPM_O3-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
|
||||
; OLDPM_O3-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
|
||||
; OLDPM_O3-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
|
||||
; OLDPM_O3-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
|
||||
; OLDPM_O3: for.cond1.preheader.us:
|
||||
; OLDPM_O3-NEXT: [[I_08_US:%.*]] = phi i64 [ [[INC7_US:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
|
||||
; OLDPM_O3-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_US_PREHEADER:%.*]], label [[VECTOR_BODY:%.*]]
|
||||
; OLDPM_O3: vector.body:
|
||||
; OLDPM_O3-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_COND1_PREHEADER_US]] ]
|
||||
; OLDPM_O3-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
|
||||
; OLDPM_O3-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; OLDPM_O3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
||||
; OLDPM_O3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
|
||||
; OLDPM_O3-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; OLDPM_O3-NEXT: [[WIDE_LOAD11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
|
||||
; OLDPM_O3-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; OLDPM_O3-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD11]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; OLDPM_O3-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; OLDPM_O3-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
|
||||
; OLDPM_O3-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; OLDPM_O3-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
|
||||
; OLDPM_O3-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
||||
; OLDPM_O3-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; OLDPM_O3-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
; OLDPM_O3: middle.block:
|
||||
; OLDPM_O3-NEXT: br i1 [[CMP_N]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US_PREHEADER]]
|
||||
; OLDPM_O3: for.body4.us.preheader:
|
||||
; OLDPM_O3-NEXT: [[J_07_US_PH:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; OLDPM_O3-NEXT: br label [[FOR_BODY4_US:%.*]]
|
||||
; OLDPM_O3: for.body4.us:
|
||||
; OLDPM_O3-NEXT: [[J_07_US:%.*]] = phi i64 [ [[INC5_US:%.*]], [[FOR_BODY4_US]] ], [ [[J_07_US_PH]], [[FOR_BODY4_US_PREHEADER]] ]
|
||||
; OLDPM_O3-NEXT: [[ADD_PTR_I_US:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07_US]]
|
||||
; OLDPM_O3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; OLDPM_O3-NEXT: [[INC_US:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
; OLDPM_O3-NEXT: store i32 [[INC_US]], i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; OLDPM_O3-NEXT: [[INC5_US]] = add nuw i64 [[J_07_US]], 1
|
||||
; OLDPM_O3-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5_US]], [[NUMELEMS]]
|
||||
; OLDPM_O3-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US]], !llvm.loop [[LOOP7:![0-9]+]]
|
||||
; OLDPM_O3: for.cond1.for.cond.cleanup3_crit_edge.us:
|
||||
; OLDPM_O3-NEXT: [[INC7_US]] = add nuw nsw i64 [[I_08_US]], 1
|
||||
; OLDPM_O3-NEXT: [[EXITCOND10_NOT:%.*]] = icmp eq i64 [[INC7_US]], 100
|
||||
; OLDPM_O3-NEXT: br i1 [[EXITCOND10_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_COND1_PREHEADER_US]], !llvm.loop [[LOOP9:![0-9]+]]
|
||||
; OLDPM_O3: for.cond.cleanup:
|
||||
; OLDPM_O3-NEXT: ret void
|
||||
;
|
||||
; NEWPM_O1-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
|
||||
; NEWPM_O1-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; NEWPM_O1-NEXT: entry:
|
||||
; NEWPM_O1-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
|
||||
; NEWPM_O1-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; NEWPM_O1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
|
||||
; NEWPM_O1-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
|
||||
; NEWPM_O1: for.cond1.preheader:
|
||||
; NEWPM_O1-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
|
||||
; NEWPM_O1-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4:%.*]]
|
||||
; NEWPM_O1: for.cond.cleanup:
|
||||
; NEWPM_O1-NEXT: ret void
|
||||
; NEWPM_O1: for.cond.cleanup3:
|
||||
; NEWPM_O1-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
|
||||
; NEWPM_O1-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
|
||||
; NEWPM_O1-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||
; NEWPM_O1: for.body4:
|
||||
; NEWPM_O1-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ 0, [[FOR_COND1_PREHEADER]] ]
|
||||
; NEWPM_O1-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07]]
|
||||
; NEWPM_O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA2:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
|
||||
; NEWPM_O1-NEXT: store i32 [[INC]], i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA2]]
|
||||
; NEWPM_O1-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
|
||||
; NEWPM_O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
|
||||
; NEWPM_O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP6:![0-9]+]]
|
||||
;
|
||||
; NEWPM_O2-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
|
||||
; NEWPM_O2-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; NEWPM_O2-NEXT: entry:
|
||||
; NEWPM_O2-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
|
||||
; NEWPM_O2-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; NEWPM_O2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
|
||||
; NEWPM_O2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
|
||||
; NEWPM_O2-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
|
||||
; NEWPM_O2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
|
||||
; NEWPM_O2-NEXT: br label [[FOR_COND1_PREHEADER:%.*]]
|
||||
; NEWPM_O2: for.cond1.preheader:
|
||||
; NEWPM_O2-NEXT: [[I_08:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC7:%.*]], [[FOR_COND_CLEANUP3:%.*]] ]
|
||||
; NEWPM_O2-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER:%.*]]
|
||||
; NEWPM_O2: for.body4.preheader:
|
||||
; NEWPM_O2-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_PREHEADER11:%.*]], label [[VECTOR_BODY:%.*]]
|
||||
; NEWPM_O2: vector.body:
|
||||
; NEWPM_O2-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_BODY4_PREHEADER]] ]
|
||||
; NEWPM_O2-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
|
||||
; NEWPM_O2-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; NEWPM_O2-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
||||
; NEWPM_O2-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
|
||||
; NEWPM_O2-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; NEWPM_O2-NEXT: [[WIDE_LOAD10:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O2-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; NEWPM_O2-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD10]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; NEWPM_O2-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; NEWPM_O2-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O2-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; NEWPM_O2-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
||||
; NEWPM_O2-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; NEWPM_O2-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
; NEWPM_O2: middle.block:
|
||||
; NEWPM_O2-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4_PREHEADER11]]
|
||||
; NEWPM_O2: for.body4.preheader11:
|
||||
; NEWPM_O2-NEXT: [[J_07_PH:%.*]] = phi i64 [ 0, [[FOR_BODY4_PREHEADER]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; NEWPM_O2-NEXT: br label [[FOR_BODY4:%.*]]
|
||||
; NEWPM_O2: for.cond.cleanup:
|
||||
; NEWPM_O2-NEXT: ret void
|
||||
; NEWPM_O2: for.cond.cleanup3:
|
||||
; NEWPM_O2-NEXT: [[INC7]] = add nuw nsw i64 [[I_08]], 1
|
||||
; NEWPM_O2-NEXT: [[EXITCOND9_NOT:%.*]] = icmp eq i64 [[INC7]], 100
|
||||
; NEWPM_O2-NEXT: br i1 [[EXITCOND9_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER]], !llvm.loop [[LOOP7:![0-9]+]]
|
||||
; NEWPM_O2: for.body4:
|
||||
; NEWPM_O2-NEXT: [[J_07:%.*]] = phi i64 [ [[INC5:%.*]], [[FOR_BODY4]] ], [ [[J_07_PH]], [[FOR_BODY4_PREHEADER11]] ]
|
||||
; NEWPM_O2-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07]]
|
||||
; NEWPM_O2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
; NEWPM_O2-NEXT: store i32 [[INC]], i32* [[ADD_PTR_I]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O2-NEXT: [[INC5]] = add nuw i64 [[J_07]], 1
|
||||
; NEWPM_O2-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5]], [[NUMELEMS]]
|
||||
; NEWPM_O2-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP3]], label [[FOR_BODY4]], !llvm.loop [[LOOP8:![0-9]+]]
|
||||
;
|
||||
; NEWPM_O3-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
|
||||
; NEWPM_O3-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; NEWPM_O3-NEXT: entry:
|
||||
; NEWPM_O3-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
|
||||
; NEWPM_O3-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; NEWPM_O3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
|
||||
; NEWPM_O3-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]]
|
||||
; NEWPM_O3: for.cond1.preheader.us.preheader:
|
||||
; NEWPM_O3-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
|
||||
; NEWPM_O3-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
|
||||
; NEWPM_O3-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
|
||||
; NEWPM_O3-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
|
||||
; NEWPM_O3: for.cond1.preheader.us:
|
||||
; NEWPM_O3-NEXT: [[I_08_US:%.*]] = phi i64 [ [[INC7_US:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
|
||||
; NEWPM_O3-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_US_PREHEADER:%.*]], label [[VECTOR_BODY:%.*]]
|
||||
; NEWPM_O3: vector.body:
|
||||
; NEWPM_O3-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_COND1_PREHEADER_US]] ]
|
||||
; NEWPM_O3-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
|
||||
; NEWPM_O3-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; NEWPM_O3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
||||
; NEWPM_O3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
|
||||
; NEWPM_O3-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; NEWPM_O3-NEXT: [[WIDE_LOAD11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O3-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; NEWPM_O3-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD11]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; NEWPM_O3-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; NEWPM_O3-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O3-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; NEWPM_O3-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O3-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
||||
; NEWPM_O3-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; NEWPM_O3-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
; NEWPM_O3: middle.block:
|
||||
; NEWPM_O3-NEXT: br i1 [[CMP_N]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US_PREHEADER]]
|
||||
; NEWPM_O3: for.body4.us.preheader:
|
||||
; NEWPM_O3-NEXT: [[J_07_US_PH:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; NEWPM_O3-NEXT: br label [[FOR_BODY4_US:%.*]]
|
||||
; NEWPM_O3: for.body4.us:
|
||||
; NEWPM_O3-NEXT: [[J_07_US:%.*]] = phi i64 [ [[INC5_US:%.*]], [[FOR_BODY4_US]] ], [ [[J_07_US_PH]], [[FOR_BODY4_US_PREHEADER]] ]
|
||||
; NEWPM_O3-NEXT: [[ADD_PTR_I_US:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07_US]]
|
||||
; NEWPM_O3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O3-NEXT: [[INC_US:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
; NEWPM_O3-NEXT: store i32 [[INC_US]], i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; NEWPM_O3-NEXT: [[INC5_US]] = add nuw i64 [[J_07_US]], 1
|
||||
; NEWPM_O3-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5_US]], [[NUMELEMS]]
|
||||
; NEWPM_O3-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US]], !llvm.loop [[LOOP7:![0-9]+]]
|
||||
; NEWPM_O3: for.cond1.for.cond.cleanup3_crit_edge.us:
|
||||
; NEWPM_O3-NEXT: [[INC7_US]] = add nuw nsw i64 [[I_08_US]], 1
|
||||
; NEWPM_O3-NEXT: [[EXITCOND10_NOT:%.*]] = icmp eq i64 [[INC7_US]], 100
|
||||
; NEWPM_O3-NEXT: br i1 [[EXITCOND10_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_COND1_PREHEADER_US]], !llvm.loop [[LOOP9:![0-9]+]]
|
||||
; NEWPM_O3: for.cond.cleanup:
|
||||
; NEWPM_O3-NEXT: ret void
|
||||
; O3-LABEL: define {{[^@]+}}@_Z7computeRSt6vectorIiSaIiEEy
|
||||
; O3-SAME: (%"class.std::vector"* nocapture noundef nonnull readonly align 8 dereferenceable(24) [[DATA:%.*]], i64 noundef [[NUMELEMS:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; O3-NEXT: entry:
|
||||
; O3-NEXT: [[CMP26_NOT:%.*]] = icmp eq i64 [[NUMELEMS]], 0
|
||||
; O3-NEXT: [[_M_START_I:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[DATA]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; O3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START_I]], align 8
|
||||
; O3-NEXT: br i1 [[CMP26_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_COND1_PREHEADER_US_PREHEADER:%.*]]
|
||||
; O3: for.cond1.preheader.us.preheader:
|
||||
; O3-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEMS]], 8
|
||||
; O3-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEMS]], -8
|
||||
; O3-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEMS]]
|
||||
; O3-NEXT: br label [[FOR_COND1_PREHEADER_US:%.*]]
|
||||
; O3: for.cond1.preheader.us:
|
||||
; O3-NEXT: [[I_08_US:%.*]] = phi i64 [ [[INC7_US:%.*]], [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US:%.*]] ], [ 0, [[FOR_COND1_PREHEADER_US_PREHEADER]] ]
|
||||
; O3-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY4_US_PREHEADER:%.*]], label [[VECTOR_BODY:%.*]]
|
||||
; O3: vector.body:
|
||||
; O3-NEXT: [[INDEX:%.*]] = phi i64 [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ], [ 0, [[FOR_COND1_PREHEADER_US]] ]
|
||||
; O3-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[INDEX]]
|
||||
; O3-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; O3-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
||||
; O3-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 4
|
||||
; O3-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; O3-NEXT: [[WIDE_LOAD11:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0]]
|
||||
; O3-NEXT: [[TMP5:%.*]] = add nsw <4 x i32> [[WIDE_LOAD]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; O3-NEXT: [[TMP6:%.*]] = add nsw <4 x i32> [[WIDE_LOAD11]], <i32 1, i32 1, i32 1, i32 1>
|
||||
; O3-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP1]] to <4 x i32>*
|
||||
; O3-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP7]], align 4, !tbaa [[TBAA0]]
|
||||
; O3-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP3]] to <4 x i32>*
|
||||
; O3-NEXT: store <4 x i32> [[TMP6]], <4 x i32>* [[TMP8]], align 4, !tbaa [[TBAA0]]
|
||||
; O3-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
|
||||
; O3-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; O3-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||
; O3: middle.block:
|
||||
; O3-NEXT: br i1 [[CMP_N]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US_PREHEADER]]
|
||||
; O3: for.body4.us.preheader:
|
||||
; O3-NEXT: [[J_07_US_PH:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER_US]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; O3-NEXT: br label [[FOR_BODY4_US:%.*]]
|
||||
; O3: for.body4.us:
|
||||
; O3-NEXT: [[J_07_US:%.*]] = phi i64 [ [[INC5_US:%.*]], [[FOR_BODY4_US]] ], [ [[J_07_US_PH]], [[FOR_BODY4_US_PREHEADER]] ]
|
||||
; O3-NEXT: [[ADD_PTR_I_US:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[J_07_US]]
|
||||
; O3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; O3-NEXT: [[INC_US:%.*]] = add nsw i32 [[TMP10]], 1
|
||||
; O3-NEXT: store i32 [[INC_US]], i32* [[ADD_PTR_I_US]], align 4, !tbaa [[TBAA0]]
|
||||
; O3-NEXT: [[INC5_US]] = add nuw i64 [[J_07_US]], 1
|
||||
; O3-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC5_US]], [[NUMELEMS]]
|
||||
; O3-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND1_FOR_COND_CLEANUP3_CRIT_EDGE_US]], label [[FOR_BODY4_US]], !llvm.loop [[LOOP7:![0-9]+]]
|
||||
; O3: for.cond1.for.cond.cleanup3_crit_edge.us:
|
||||
; O3-NEXT: [[INC7_US]] = add nuw nsw i64 [[I_08_US]], 1
|
||||
; O3-NEXT: [[EXITCOND10_NOT:%.*]] = icmp eq i64 [[INC7_US]], 100
|
||||
; O3-NEXT: br i1 [[EXITCOND10_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_COND1_PREHEADER_US]], !llvm.loop [[LOOP9:![0-9]+]]
|
||||
; O3: for.cond.cleanup:
|
||||
; O3-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%data.addr = alloca %"class.std::vector"*, align 8
|
||||
|
|
@ -352,14 +219,6 @@ for.end8:
|
|||
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
|
||||
|
||||
define linkonce_odr dso_local noundef nonnull align 4 dereferenceable(4) i32* @_ZNSt6vectorIiSaIiEEixEm(%"class.std::vector"* noundef nonnull align 8 dereferenceable(24) %this, i64 noundef %__n) comdat align 2 {
|
||||
; OLDPM_O1-LABEL: define {{[^@]+}}@_ZNSt6vectorIiSaIiEEixEm
|
||||
; OLDPM_O1-SAME: (%"class.std::vector"* noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[__N:%.*]]) local_unnamed_addr comdat align 2 {
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: [[_M_START:%.*]] = getelementptr inbounds %"class.std::vector", %"class.std::vector"* [[THIS]], i64 0, i32 0, i32 0, i32 0, i32 0
|
||||
; OLDPM_O1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[_M_START]], align 8, !tbaa [[TBAA7:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[__N]]
|
||||
; OLDPM_O1-NEXT: ret i32* [[ADD_PTR]]
|
||||
;
|
||||
entry:
|
||||
%this.addr = alloca %"class.std::vector"*, align 8
|
||||
%__n.addr = alloca i64, align 8
|
||||
|
|
|
|||
|
|
@ -1,10 +1,7 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O1 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O1 %s
|
||||
; RUN: opt -O2 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O23 %s
|
||||
; RUN: opt -O3 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O23 %s
|
||||
; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=NEWPM_O1 %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=NEWPM_O23 %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=NEWPM_O23 %s
|
||||
; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=O1 %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=O23 %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=O23 %s
|
||||
|
||||
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
|
@ -12,115 +9,60 @@ target triple = "x86_64-unknown-linux-gnu"
|
|||
; We should retain the TBAA on the load here, not lose it.
|
||||
|
||||
define void @licm(double** align 8 dereferenceable(8) %_M_start.i, i64 %numElem) {
|
||||
; OLDPM_O1-LABEL: @licm(
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; OLDPM_O1-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; OLDPM_O1: for.body.lr.ph:
|
||||
; OLDPM_O1-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; OLDPM_O1: for.body:
|
||||
; OLDPM_O1-NEXT: [[K_02:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
|
||||
; OLDPM_O1-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; OLDPM_O1-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; OLDPM_O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; OLDPM_O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]]
|
||||
; OLDPM_O1: for.cond.cleanup:
|
||||
; OLDPM_O1-NEXT: ret void
|
||||
; O1-LABEL: @licm(
|
||||
; O1-NEXT: entry:
|
||||
; O1-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; O1-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; O1: for.body.lr.ph:
|
||||
; O1-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; O1-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; O1: for.body:
|
||||
; O1-NEXT: [[K_02:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
|
||||
; O1-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; O1-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; O1-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]]
|
||||
; O1: for.cond.cleanup:
|
||||
; O1-NEXT: ret void
|
||||
;
|
||||
; OLDPM_O23-LABEL: @licm(
|
||||
; OLDPM_O23-NEXT: entry:
|
||||
; OLDPM_O23-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; OLDPM_O23-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; OLDPM_O23: for.body.lr.ph:
|
||||
; OLDPM_O23-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEM]], 4
|
||||
; OLDPM_O23-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY_PREHEADER:%.*]], label [[VECTOR_PH:%.*]]
|
||||
; OLDPM_O23: vector.ph:
|
||||
; OLDPM_O23-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEM]], -4
|
||||
; OLDPM_O23-NEXT: br label [[VECTOR_BODY:%.*]]
|
||||
; OLDPM_O23: vector.body:
|
||||
; OLDPM_O23-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
||||
; OLDPM_O23-NEXT: [[TMP1:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[INDEX]]
|
||||
; OLDPM_O23-NEXT: [[TMP2:%.*]] = bitcast double* [[TMP1]] to <2 x double>*
|
||||
; OLDPM_O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP2]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, double* [[TMP1]], i64 2
|
||||
; OLDPM_O23-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
|
||||
; OLDPM_O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP4]], align 8, !tbaa [[TBAA8]]
|
||||
; OLDPM_O23-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
||||
; OLDPM_O23-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; OLDPM_O23-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
||||
; OLDPM_O23: middle.block:
|
||||
; OLDPM_O23-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEM]]
|
||||
; OLDPM_O23-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_PREHEADER]]
|
||||
; OLDPM_O23: for.body.preheader:
|
||||
; OLDPM_O23-NEXT: [[K_02_PH:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; OLDPM_O23-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; OLDPM_O23: for.body:
|
||||
; OLDPM_O23-NEXT: [[K_02:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ [[K_02_PH]], [[FOR_BODY_PREHEADER]] ]
|
||||
; OLDPM_O23-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; OLDPM_O23-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8]]
|
||||
; OLDPM_O23-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; OLDPM_O23-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; OLDPM_O23-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
||||
; OLDPM_O23: for.cond.cleanup:
|
||||
; OLDPM_O23-NEXT: ret void
|
||||
;
|
||||
; NEWPM_O1-LABEL: @licm(
|
||||
; NEWPM_O1-NEXT: entry:
|
||||
; NEWPM_O1-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; NEWPM_O1-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; NEWPM_O1: for.body.lr.ph:
|
||||
; NEWPM_O1-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; NEWPM_O1: for.body:
|
||||
; NEWPM_O1-NEXT: [[K_02:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
|
||||
; NEWPM_O1-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; NEWPM_O1-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; NEWPM_O1-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; NEWPM_O1-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]]
|
||||
; NEWPM_O1: for.cond.cleanup:
|
||||
; NEWPM_O1-NEXT: ret void
|
||||
;
|
||||
; NEWPM_O23-LABEL: @licm(
|
||||
; NEWPM_O23-NEXT: entry:
|
||||
; NEWPM_O23-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; NEWPM_O23-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; NEWPM_O23: for.body.lr.ph:
|
||||
; NEWPM_O23-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEM]], 4
|
||||
; NEWPM_O23-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY_PREHEADER:%.*]], label [[VECTOR_PH:%.*]]
|
||||
; NEWPM_O23: vector.ph:
|
||||
; NEWPM_O23-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEM]], -4
|
||||
; NEWPM_O23-NEXT: br label [[VECTOR_BODY:%.*]]
|
||||
; NEWPM_O23: vector.body:
|
||||
; NEWPM_O23-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
||||
; NEWPM_O23-NEXT: [[TMP1:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[INDEX]]
|
||||
; NEWPM_O23-NEXT: [[TMP2:%.*]] = bitcast double* [[TMP1]] to <2 x double>*
|
||||
; NEWPM_O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP2]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, double* [[TMP1]], i64 2
|
||||
; NEWPM_O23-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
|
||||
; NEWPM_O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP4]], align 8, !tbaa [[TBAA8]]
|
||||
; NEWPM_O23-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
||||
; NEWPM_O23-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; NEWPM_O23-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
||||
; NEWPM_O23: middle.block:
|
||||
; NEWPM_O23-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEM]]
|
||||
; NEWPM_O23-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_PREHEADER]]
|
||||
; NEWPM_O23: for.body.preheader:
|
||||
; NEWPM_O23-NEXT: [[K_02_PH:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; NEWPM_O23-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; NEWPM_O23: for.body:
|
||||
; NEWPM_O23-NEXT: [[K_02:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ [[K_02_PH]], [[FOR_BODY_PREHEADER]] ]
|
||||
; NEWPM_O23-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; NEWPM_O23-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8]]
|
||||
; NEWPM_O23-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; NEWPM_O23-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; NEWPM_O23-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
||||
; NEWPM_O23: for.cond.cleanup:
|
||||
; NEWPM_O23-NEXT: ret void
|
||||
; O23-LABEL: @licm(
|
||||
; O23-NEXT: entry:
|
||||
; O23-NEXT: [[CMP1_NOT:%.*]] = icmp eq i64 [[NUMELEM:%.*]], 0
|
||||
; O23-NEXT: br i1 [[CMP1_NOT]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_LR_PH:%.*]]
|
||||
; O23: for.body.lr.ph:
|
||||
; O23-NEXT: [[TMP0:%.*]] = load double*, double** [[_M_START_I:%.*]], align 8, !tbaa [[TBAA3:![0-9]+]]
|
||||
; O23-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[NUMELEM]], 4
|
||||
; O23-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[FOR_BODY_PREHEADER:%.*]], label [[VECTOR_PH:%.*]]
|
||||
; O23: vector.ph:
|
||||
; O23-NEXT: [[N_VEC:%.*]] = and i64 [[NUMELEM]], -4
|
||||
; O23-NEXT: br label [[VECTOR_BODY:%.*]]
|
||||
; O23: vector.body:
|
||||
; O23-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
||||
; O23-NEXT: [[TMP1:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[INDEX]]
|
||||
; O23-NEXT: [[TMP2:%.*]] = bitcast double* [[TMP1]] to <2 x double>*
|
||||
; O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP2]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; O23-NEXT: [[TMP3:%.*]] = getelementptr inbounds double, double* [[TMP1]], i64 2
|
||||
; O23-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP3]] to <2 x double>*
|
||||
; O23-NEXT: store <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double>* [[TMP4]], align 8, !tbaa [[TBAA8]]
|
||||
; O23-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
|
||||
; O23-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
|
||||
; O23-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
|
||||
; O23: middle.block:
|
||||
; O23-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N_VEC]], [[NUMELEM]]
|
||||
; O23-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY_PREHEADER]]
|
||||
; O23: for.body.preheader:
|
||||
; O23-NEXT: [[K_02_PH:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[N_VEC]], [[MIDDLE_BLOCK]] ]
|
||||
; O23-NEXT: br label [[FOR_BODY:%.*]]
|
||||
; O23: for.body:
|
||||
; O23-NEXT: [[K_02:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ [[K_02_PH]], [[FOR_BODY_PREHEADER]] ]
|
||||
; O23-NEXT: [[ADD_PTR_I:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[K_02]]
|
||||
; O23-NEXT: store double 2.000000e+00, double* [[ADD_PTR_I]], align 8, !tbaa [[TBAA8]]
|
||||
; O23-NEXT: [[INC]] = add nuw i64 [[K_02]], 1
|
||||
; O23-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[NUMELEM]]
|
||||
; O23-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
|
||||
; O23: for.cond.cleanup:
|
||||
; O23-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
br label %for.cond
|
||||
|
|
|
|||
|
|
@ -1,10 +1,7 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature
|
||||
; RUN: opt -O1 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O1 %s
|
||||
; RUN: opt -O2 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O23 %s
|
||||
; RUN: opt -O3 -S -enable-new-pm=0 < %s | FileCheck --check-prefixes=OLDPM_O23 %s
|
||||
; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=NEWPM_O1 %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=NEWPM_O23 %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=NEWPM_O23 %s
|
||||
; RUN: opt -passes='default<O1>' -S < %s | FileCheck --check-prefixes=O1 %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck --check-prefixes=O23 %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck --check-prefixes=O23 %s
|
||||
|
||||
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-linux-gnu"
|
||||
|
|
@ -16,106 +13,68 @@ target triple = "x86_64-unknown-linux-gnu"
|
|||
$_ZN12FloatVecPair6vecIncEv = comdat any
|
||||
|
||||
define dso_local void @_Z13vecIncFromPtrP12FloatVecPair(%class.FloatVecPair* %FVP) {
|
||||
; OLDPM_O1-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; OLDPM_O1-SAME: (%class.FloatVecPair* [[FVP:%.*]]) local_unnamed_addr {
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: call void @_ZN12FloatVecPair6vecIncEv(%class.FloatVecPair* [[FVP]])
|
||||
; OLDPM_O1-NEXT: ret void
|
||||
; O1-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; O1-SAME: (%class.FloatVecPair* nocapture readonly [[FVP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; O1-NEXT: entry:
|
||||
; O1-NEXT: [[BASE_I_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[FVP]], i64 0, i32 1, i32 0
|
||||
; O1-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I_I]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; O1-NEXT: [[SIZE4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 1
|
||||
; O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIZE4_I]], align 8, !tbaa [[TBAA6:![0-9]+]]
|
||||
; O1-NEXT: [[CMP510_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
|
||||
; O1-NEXT: br i1 [[CMP510_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT:%.*]], label [[FOR_BODY7_LR_PH_I:%.*]]
|
||||
; O1: for.body7.lr.ph.i:
|
||||
; O1-NEXT: [[BASE_I4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 0
|
||||
; O1-NEXT: [[TMP2:%.*]] = load float*, float** [[BASE_I4_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; O1-NEXT: [[ARRAYIDX_I5_I:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 undef
|
||||
; O1-NEXT: [[BASE_I6_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[FVP]], i64 0, i32 0, i32 0
|
||||
; O1-NEXT: [[TMP3:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I6_I]], align 8, !tbaa [[TBAA0]]
|
||||
; O1-NEXT: [[BASE_I8_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP3]], i64 undef, i32 0
|
||||
; O1-NEXT: [[TMP4:%.*]] = load float*, float** [[BASE_I8_I]], align 8, !tbaa [[TBAA8]]
|
||||
; O1-NEXT: [[ARRAYIDX_I9_I:%.*]] = getelementptr inbounds float, float* [[TMP4]], i64 undef
|
||||
; O1-NEXT: br label [[FOR_BODY7_I:%.*]]
|
||||
; O1: for.body7.i:
|
||||
; O1-NEXT: [[J_011_I:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH_I]] ], [ [[INC_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; O1-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX_I5_I]], align 4, !tbaa [[TBAA9:![0-9]+]]
|
||||
; O1-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; O1-NEXT: [[ADD_I:%.*]] = fadd float [[TMP5]], [[TMP6]]
|
||||
; O1-NEXT: store float [[ADD_I]], float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; O1-NEXT: [[INC_I]] = add nuw i32 [[J_011_I]], 1
|
||||
; O1-NEXT: [[EXITCOND_NOT_I:%.*]] = icmp eq i32 [[INC_I]], [[TMP1]]
|
||||
; O1-NEXT: br i1 [[EXITCOND_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT]], label [[FOR_BODY7_I]], !llvm.loop [[LOOP11:![0-9]+]]
|
||||
; O1: _ZN12FloatVecPair6vecIncEv.exit:
|
||||
; O1-NEXT: ret void
|
||||
;
|
||||
; OLDPM_O23-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; OLDPM_O23-SAME: (%class.FloatVecPair* nocapture readonly [[FVP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; OLDPM_O23-NEXT: entry:
|
||||
; OLDPM_O23-NEXT: [[BASE_I_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[FVP]], i64 0, i32 1, i32 0
|
||||
; OLDPM_O23-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I_I]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: [[SIZE4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 1
|
||||
; OLDPM_O23-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIZE4_I]], align 8, !tbaa [[TBAA6:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: [[CMP510_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
|
||||
; OLDPM_O23-NEXT: br i1 [[CMP510_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT:%.*]], label [[FOR_BODY7_LR_PH_I:%.*]]
|
||||
; OLDPM_O23: for.body7.lr.ph.i:
|
||||
; OLDPM_O23-NEXT: [[BASE_I6_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 0
|
||||
; OLDPM_O23-NEXT: [[TMP2:%.*]] = load float*, float** [[BASE_I6_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: [[ARRAYIDX_I7_I:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 undef
|
||||
; OLDPM_O23-NEXT: [[BASE_I4_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[FVP]], i64 0, i32 0, i32 0
|
||||
; OLDPM_O23-NEXT: [[TMP3:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I4_I]], align 8, !tbaa [[TBAA0]]
|
||||
; OLDPM_O23-NEXT: [[BASE_I2_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP3]], i64 undef, i32 0
|
||||
; OLDPM_O23-NEXT: [[TMP4:%.*]] = load float*, float** [[BASE_I2_I]], align 8, !tbaa [[TBAA8]]
|
||||
; OLDPM_O23-NEXT: [[ARRAYIDX_I3_I:%.*]] = getelementptr inbounds float, float* [[TMP4]], i64 undef
|
||||
; OLDPM_O23-NEXT: [[DOTPRE_I:%.*]] = load float, float* [[ARRAYIDX_I3_I]], align 4, !tbaa [[TBAA9:![0-9]+]]
|
||||
; OLDPM_O23-NEXT: br label [[FOR_BODY7_I:%.*]]
|
||||
; OLDPM_O23: for.body7.i:
|
||||
; OLDPM_O23-NEXT: [[TMP5:%.*]] = phi float [ [[DOTPRE_I]], [[FOR_BODY7_LR_PH_I]] ], [ [[ADD_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; OLDPM_O23-NEXT: [[J_011_I:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH_I]] ], [ [[INC_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; OLDPM_O23-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX_I7_I]], align 4, !tbaa [[TBAA9]]
|
||||
; OLDPM_O23-NEXT: [[ADD_I]] = fadd float [[TMP5]], [[TMP6]]
|
||||
; OLDPM_O23-NEXT: store float [[ADD_I]], float* [[ARRAYIDX_I3_I]], align 4, !tbaa [[TBAA9]]
|
||||
; OLDPM_O23-NEXT: [[INC_I]] = add nuw i32 [[J_011_I]], 1
|
||||
; OLDPM_O23-NEXT: [[EXITCOND_NOT_I:%.*]] = icmp eq i32 [[INC_I]], [[TMP1]]
|
||||
; OLDPM_O23-NEXT: br i1 [[EXITCOND_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT]], label [[FOR_BODY7_I]], !llvm.loop [[LOOP11:![0-9]+]]
|
||||
; OLDPM_O23: _ZN12FloatVecPair6vecIncEv.exit:
|
||||
; OLDPM_O23-NEXT: ret void
|
||||
;
|
||||
; NEWPM_O1-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; NEWPM_O1-SAME: (%class.FloatVecPair* nocapture readonly [[FVP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; NEWPM_O1-NEXT: entry:
|
||||
; NEWPM_O1-NEXT: [[BASE_I_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[FVP]], i64 0, i32 1, i32 0
|
||||
; NEWPM_O1-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I_I]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[SIZE4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 1
|
||||
; NEWPM_O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIZE4_I]], align 8, !tbaa [[TBAA6:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[CMP510_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
|
||||
; NEWPM_O1-NEXT: br i1 [[CMP510_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT:%.*]], label [[FOR_BODY7_LR_PH_I:%.*]]
|
||||
; NEWPM_O1: for.body7.lr.ph.i:
|
||||
; NEWPM_O1-NEXT: [[BASE_I4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 0
|
||||
; NEWPM_O1-NEXT: [[TMP2:%.*]] = load float*, float** [[BASE_I4_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[ARRAYIDX_I5_I:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 undef
|
||||
; NEWPM_O1-NEXT: [[BASE_I6_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[FVP]], i64 0, i32 0, i32 0
|
||||
; NEWPM_O1-NEXT: [[TMP3:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I6_I]], align 8, !tbaa [[TBAA0]]
|
||||
; NEWPM_O1-NEXT: [[BASE_I8_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP3]], i64 undef, i32 0
|
||||
; NEWPM_O1-NEXT: [[TMP4:%.*]] = load float*, float** [[BASE_I8_I]], align 8, !tbaa [[TBAA8]]
|
||||
; NEWPM_O1-NEXT: [[ARRAYIDX_I9_I:%.*]] = getelementptr inbounds float, float* [[TMP4]], i64 undef
|
||||
; NEWPM_O1-NEXT: br label [[FOR_BODY7_I:%.*]]
|
||||
; NEWPM_O1: for.body7.i:
|
||||
; NEWPM_O1-NEXT: [[J_011_I:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH_I]] ], [ [[INC_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; NEWPM_O1-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX_I5_I]], align 4, !tbaa [[TBAA9:![0-9]+]]
|
||||
; NEWPM_O1-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; NEWPM_O1-NEXT: [[ADD_I:%.*]] = fadd float [[TMP5]], [[TMP6]]
|
||||
; NEWPM_O1-NEXT: store float [[ADD_I]], float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; NEWPM_O1-NEXT: [[INC_I]] = add nuw i32 [[J_011_I]], 1
|
||||
; NEWPM_O1-NEXT: [[EXITCOND_NOT_I:%.*]] = icmp eq i32 [[INC_I]], [[TMP1]]
|
||||
; NEWPM_O1-NEXT: br i1 [[EXITCOND_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT]], label [[FOR_BODY7_I]], !llvm.loop [[LOOP11:![0-9]+]]
|
||||
; NEWPM_O1: _ZN12FloatVecPair6vecIncEv.exit:
|
||||
; NEWPM_O1-NEXT: ret void
|
||||
;
|
||||
; NEWPM_O23-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; NEWPM_O23-SAME: (%class.FloatVecPair* nocapture readonly [[FVP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; NEWPM_O23-NEXT: entry:
|
||||
; NEWPM_O23-NEXT: [[BASE_I_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[FVP]], i64 0, i32 1, i32 0
|
||||
; NEWPM_O23-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I_I]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: [[SIZE4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 1
|
||||
; NEWPM_O23-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIZE4_I]], align 8, !tbaa [[TBAA6:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: [[CMP510_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
|
||||
; NEWPM_O23-NEXT: br i1 [[CMP510_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT:%.*]], label [[FOR_BODY7_LR_PH_I:%.*]]
|
||||
; NEWPM_O23: for.body7.lr.ph.i:
|
||||
; NEWPM_O23-NEXT: [[BASE_I4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 0
|
||||
; NEWPM_O23-NEXT: [[TMP2:%.*]] = load float*, float** [[BASE_I4_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: [[ARRAYIDX_I5_I:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 undef
|
||||
; NEWPM_O23-NEXT: [[BASE_I6_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[FVP]], i64 0, i32 0, i32 0
|
||||
; NEWPM_O23-NEXT: [[TMP3:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I6_I]], align 8, !tbaa [[TBAA0]]
|
||||
; NEWPM_O23-NEXT: [[BASE_I8_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP3]], i64 undef, i32 0
|
||||
; NEWPM_O23-NEXT: [[TMP4:%.*]] = load float*, float** [[BASE_I8_I]], align 8, !tbaa [[TBAA8]]
|
||||
; NEWPM_O23-NEXT: [[ARRAYIDX_I9_I:%.*]] = getelementptr inbounds float, float* [[TMP4]], i64 undef
|
||||
; NEWPM_O23-NEXT: [[DOTPRE_I:%.*]] = load float, float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9:![0-9]+]]
|
||||
; NEWPM_O23-NEXT: br label [[FOR_BODY7_I:%.*]]
|
||||
; NEWPM_O23: for.body7.i:
|
||||
; NEWPM_O23-NEXT: [[TMP5:%.*]] = phi float [ [[DOTPRE_I]], [[FOR_BODY7_LR_PH_I]] ], [ [[ADD_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; NEWPM_O23-NEXT: [[J_011_I:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH_I]] ], [ [[INC_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; NEWPM_O23-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX_I5_I]], align 4, !tbaa [[TBAA9]]
|
||||
; NEWPM_O23-NEXT: [[ADD_I]] = fadd float [[TMP5]], [[TMP6]]
|
||||
; NEWPM_O23-NEXT: store float [[ADD_I]], float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; NEWPM_O23-NEXT: [[INC_I]] = add nuw i32 [[J_011_I]], 1
|
||||
; NEWPM_O23-NEXT: [[EXITCOND_NOT_I:%.*]] = icmp eq i32 [[INC_I]], [[TMP1]]
|
||||
; NEWPM_O23-NEXT: br i1 [[EXITCOND_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT]], label [[FOR_BODY7_I]], !llvm.loop [[LOOP11:![0-9]+]]
|
||||
; NEWPM_O23: _ZN12FloatVecPair6vecIncEv.exit:
|
||||
; NEWPM_O23-NEXT: ret void
|
||||
; O23-LABEL: define {{[^@]+}}@_Z13vecIncFromPtrP12FloatVecPair
|
||||
; O23-SAME: (%class.FloatVecPair* nocapture readonly [[FVP:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
|
||||
; O23-NEXT: entry:
|
||||
; O23-NEXT: [[BASE_I_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[FVP]], i64 0, i32 1, i32 0
|
||||
; O23-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I_I]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; O23-NEXT: [[SIZE4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 1
|
||||
; O23-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIZE4_I]], align 8, !tbaa [[TBAA6:![0-9]+]]
|
||||
; O23-NEXT: [[CMP510_NOT_I:%.*]] = icmp eq i32 [[TMP1]], 0
|
||||
; O23-NEXT: br i1 [[CMP510_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT:%.*]], label [[FOR_BODY7_LR_PH_I:%.*]]
|
||||
; O23: for.body7.lr.ph.i:
|
||||
; O23-NEXT: [[BASE_I4_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP0]], i64 undef, i32 0
|
||||
; O23-NEXT: [[TMP2:%.*]] = load float*, float** [[BASE_I4_I]], align 8, !tbaa [[TBAA8:![0-9]+]]
|
||||
; O23-NEXT: [[ARRAYIDX_I5_I:%.*]] = getelementptr inbounds float, float* [[TMP2]], i64 undef
|
||||
; O23-NEXT: [[BASE_I6_I:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[FVP]], i64 0, i32 0, i32 0
|
||||
; O23-NEXT: [[TMP3:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE_I6_I]], align 8, !tbaa [[TBAA0]]
|
||||
; O23-NEXT: [[BASE_I8_I:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[TMP3]], i64 undef, i32 0
|
||||
; O23-NEXT: [[TMP4:%.*]] = load float*, float** [[BASE_I8_I]], align 8, !tbaa [[TBAA8]]
|
||||
; O23-NEXT: [[ARRAYIDX_I9_I:%.*]] = getelementptr inbounds float, float* [[TMP4]], i64 undef
|
||||
; O23-NEXT: [[DOTPRE_I:%.*]] = load float, float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9:![0-9]+]]
|
||||
; O23-NEXT: br label [[FOR_BODY7_I:%.*]]
|
||||
; O23: for.body7.i:
|
||||
; O23-NEXT: [[TMP5:%.*]] = phi float [ [[DOTPRE_I]], [[FOR_BODY7_LR_PH_I]] ], [ [[ADD_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; O23-NEXT: [[J_011_I:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH_I]] ], [ [[INC_I:%.*]], [[FOR_BODY7_I]] ]
|
||||
; O23-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX_I5_I]], align 4, !tbaa [[TBAA9]]
|
||||
; O23-NEXT: [[ADD_I]] = fadd float [[TMP5]], [[TMP6]]
|
||||
; O23-NEXT: store float [[ADD_I]], float* [[ARRAYIDX_I9_I]], align 4, !tbaa [[TBAA9]]
|
||||
; O23-NEXT: [[INC_I]] = add nuw i32 [[J_011_I]], 1
|
||||
; O23-NEXT: [[EXITCOND_NOT_I:%.*]] = icmp eq i32 [[INC_I]], [[TMP1]]
|
||||
; O23-NEXT: br i1 [[EXITCOND_NOT_I]], label [[_ZN12FLOATVECPAIR6VECINCEV_EXIT]], label [[FOR_BODY7_I]], !llvm.loop [[LOOP11:![0-9]+]]
|
||||
; O23: _ZN12FloatVecPair6vecIncEv.exit:
|
||||
; O23-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%FVP.addr = alloca %class.FloatVecPair*, align 8
|
||||
|
|
@ -126,37 +85,6 @@ entry:
|
|||
}
|
||||
|
||||
define linkonce_odr dso_local void @_ZN12FloatVecPair6vecIncEv(%class.FloatVecPair* %this) comdat align 2 {
|
||||
; OLDPM_O1-LABEL: define {{[^@]+}}@_ZN12FloatVecPair6vecIncEv
|
||||
; OLDPM_O1-SAME: (%class.FloatVecPair* [[THIS:%.*]]) local_unnamed_addr comdat align 2 {
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: [[VSRC23:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR:%.*]], %class.FloatVecPair* [[THIS]], i64 0, i32 1
|
||||
; OLDPM_O1-NEXT: [[CALL2:%.*]] = call %class.HomemadeVector.0* @_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj(%class.HomemadeVector* nonnull [[VSRC23]])
|
||||
; OLDPM_O1-NEXT: [[SIZE43:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[CALL2]], i64 0, i32 1
|
||||
; OLDPM_O1-NEXT: [[TMP0:%.*]] = load i32, i32* [[SIZE43]], align 8, !tbaa [[TBAA0:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[CMP54_NOT:%.*]] = icmp eq i32 [[TMP0]], 0
|
||||
; OLDPM_O1-NEXT: br i1 [[CMP54_NOT]], label [[FOR_COND_CLEANUP6:%.*]], label [[FOR_BODY7_LR_PH:%.*]]
|
||||
; OLDPM_O1: for.body7.lr.ph:
|
||||
; OLDPM_O1-NEXT: [[VSRCDST:%.*]] = getelementptr inbounds [[CLASS_FLOATVECPAIR]], %class.FloatVecPair* [[THIS]], i64 0, i32 0
|
||||
; OLDPM_O1-NEXT: br label [[FOR_BODY7:%.*]]
|
||||
; OLDPM_O1: for.cond.cleanup6:
|
||||
; OLDPM_O1-NEXT: ret void
|
||||
; OLDPM_O1: for.body7:
|
||||
; OLDPM_O1-NEXT: [[J_05:%.*]] = phi i32 [ 0, [[FOR_BODY7_LR_PH]] ], [ [[INC:%.*]], [[FOR_BODY7]] ]
|
||||
; OLDPM_O1-NEXT: [[CALL9:%.*]] = call %class.HomemadeVector.0* @_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj(%class.HomemadeVector* nonnull [[VSRC23]])
|
||||
; OLDPM_O1-NEXT: [[CALL10:%.*]] = call float* @_ZN14HomemadeVectorIfLj8EEixEj(%class.HomemadeVector.0* [[CALL9]])
|
||||
; OLDPM_O1-NEXT: [[TMP1:%.*]] = load float, float* [[CALL10]], align 4, !tbaa [[TBAA6:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[CALL11:%.*]] = call %class.HomemadeVector.0* @_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj(%class.HomemadeVector* [[VSRCDST]])
|
||||
; OLDPM_O1-NEXT: [[CALL12:%.*]] = call float* @_ZN14HomemadeVectorIfLj8EEixEj(%class.HomemadeVector.0* [[CALL11]])
|
||||
; OLDPM_O1-NEXT: [[TMP2:%.*]] = load float, float* [[CALL12]], align 4, !tbaa [[TBAA6]]
|
||||
; OLDPM_O1-NEXT: [[ADD:%.*]] = fadd float [[TMP1]], [[TMP2]]
|
||||
; OLDPM_O1-NEXT: store float [[ADD]], float* [[CALL12]], align 4, !tbaa [[TBAA6]]
|
||||
; OLDPM_O1-NEXT: [[INC]] = add nuw i32 [[J_05]], 1
|
||||
; OLDPM_O1-NEXT: [[CALL:%.*]] = call %class.HomemadeVector.0* @_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj(%class.HomemadeVector* nonnull [[VSRC23]])
|
||||
; OLDPM_O1-NEXT: [[SIZE4:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0]], %class.HomemadeVector.0* [[CALL]], i64 0, i32 1
|
||||
; OLDPM_O1-NEXT: [[TMP3:%.*]] = load i32, i32* [[SIZE4]], align 8, !tbaa [[TBAA0]]
|
||||
; OLDPM_O1-NEXT: [[CMP5:%.*]] = icmp ult i32 [[INC]], [[TMP3]]
|
||||
; OLDPM_O1-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6]], !llvm.loop [[LOOP8:![0-9]+]]
|
||||
;
|
||||
entry:
|
||||
%this.addr = alloca %class.FloatVecPair*, align 8
|
||||
%j = alloca i32, align 4
|
||||
|
|
@ -204,14 +132,6 @@ for.inc: ; preds = %for.body7
|
|||
}
|
||||
|
||||
define linkonce_odr dso_local %class.HomemadeVector.0* @_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj(%class.HomemadeVector* %this) align 2 {
|
||||
; OLDPM_O1-LABEL: define {{[^@]+}}@_ZN14HomemadeVectorIS_IfLj8EELj8EEixEj
|
||||
; OLDPM_O1-SAME: (%class.HomemadeVector* [[THIS:%.*]]) local_unnamed_addr align 2 {
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: [[BASE:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR:%.*]], %class.HomemadeVector* [[THIS]], i64 0, i32 0
|
||||
; OLDPM_O1-NEXT: [[TMP0:%.*]] = load %class.HomemadeVector.0*, %class.HomemadeVector.0** [[BASE]], align 8, !tbaa [[TBAA10:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[TMP0]], i64 undef
|
||||
; OLDPM_O1-NEXT: ret %class.HomemadeVector.0* [[ARRAYIDX]]
|
||||
;
|
||||
entry:
|
||||
%this.addr = alloca %class.HomemadeVector*, align 8
|
||||
store %class.HomemadeVector* %this, %class.HomemadeVector** %this.addr, align 8, !tbaa !0
|
||||
|
|
@ -225,14 +145,6 @@ entry:
|
|||
}
|
||||
|
||||
define linkonce_odr dso_local float* @_ZN14HomemadeVectorIfLj8EEixEj(%class.HomemadeVector.0* %this) align 2 {
|
||||
; OLDPM_O1-LABEL: define {{[^@]+}}@_ZN14HomemadeVectorIfLj8EEixEj
|
||||
; OLDPM_O1-SAME: (%class.HomemadeVector.0* [[THIS:%.*]]) local_unnamed_addr align 2 {
|
||||
; OLDPM_O1-NEXT: entry:
|
||||
; OLDPM_O1-NEXT: [[BASE:%.*]] = getelementptr inbounds [[CLASS_HOMEMADEVECTOR_0:%.*]], %class.HomemadeVector.0* [[THIS]], i64 0, i32 0
|
||||
; OLDPM_O1-NEXT: [[TMP0:%.*]] = load float*, float** [[BASE]], align 8, !tbaa [[TBAA12:![0-9]+]]
|
||||
; OLDPM_O1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[TMP0]], i64 undef
|
||||
; OLDPM_O1-NEXT: ret float* [[ARRAYIDX]]
|
||||
;
|
||||
entry:
|
||||
%this.addr = alloca %class.HomemadeVector.0*, align 8
|
||||
store %class.HomemadeVector.0* %this, %class.HomemadeVector.0** %this.addr, align 8, !tbaa !0
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
; RUN: opt -O3 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
|
||||
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64"
|
||||
|
|
|
|||
|
|
@ -1,14 +1,7 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O3 -rotation-max-header-size=0 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=HOIST
|
||||
; RUN: opt -passes='default<O3>' -rotation-max-header-size=0 -S < %s | FileCheck %s --check-prefix=HOIST
|
||||
|
||||
; RUN: opt -O3 -rotation-max-header-size=1 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=HOIST
|
||||
; RUN: opt -passes='default<O3>' -rotation-max-header-size=1 -S < %s | FileCheck %s --check-prefix=HOIST
|
||||
|
||||
; RUN: opt -O3 -rotation-max-header-size=2 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=ROTATE
|
||||
; RUN: opt -passes='default<O3>' -rotation-max-header-size=2 -S < %s | FileCheck %s --check-prefix=ROTATE
|
||||
|
||||
; RUN: opt -O3 -rotation-max-header-size=3 -S -enable-new-pm=0 < %s | FileCheck %s --check-prefix=ROTATE
|
||||
; RUN: opt -passes='default<O3>' -rotation-max-header-size=3 -S < %s | FileCheck %s --check-prefix=ROTATE
|
||||
|
||||
; This example is produced from a very basic C code:
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
|
||||
|
||||
define i64 @PR36760(i64 %a) {
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
|
||||
|
||||
define void @copy(i32* noalias %to, i32* noalias %from) {
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
|
||||
|
||||
define void @PR45687(i32 %0) {
|
||||
|
|
|
|||
|
|
@ -1,19 +1,14 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; REQUIRES: powerpc-registered-target
|
||||
; RUN: opt -O2 -enable-new-pm=0 -S < %s | FileCheck %s --check-prefix=OLDPM
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s --check-prefix=NEWPM
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
|
||||
|
||||
target datalayout = "e-m:e-i64:64-n32:64"
|
||||
target triple = "powerpc64le-unknown-linux-gnu"
|
||||
|
||||
define dso_local i64 @func(i64 %blah, i64 %limit) #0 {
|
||||
; OLDPM-LABEL: @func(
|
||||
; OLDPM-NEXT: entry:
|
||||
; OLDPM-NEXT: ret i64 undef
|
||||
;
|
||||
; NEWPM-LABEL: @func(
|
||||
; NEWPM-NEXT: entry:
|
||||
; NEWPM-NEXT: ret i64 undef
|
||||
; CHECK-LABEL: @func(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: ret i64 undef
|
||||
;
|
||||
entry:
|
||||
%blah.addr = alloca i64, align 8
|
||||
|
|
|
|||
|
|
@ -1,7 +1,4 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
||||
; RUN: opt -O1 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -O3 -S < %s -enable-new-pm=0 | FileCheck %s
|
||||
; RUN: opt -passes='default<O1>' -S < %s | FileCheck %s
|
||||
; RUN: opt -passes='default<O2>' -S < %s | FileCheck %s
|
||||
; RUN: opt -passes='default<O3>' -S < %s | FileCheck %s
|
||||
|
|
|
|||
Loading…
Reference in New Issue