forked from OSchip/llvm-project
[DAGCombiner] simplify bool return in getStoreMergeCandidates; NFC
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@ -16133,7 +16133,7 @@ void DAGCombiner::getStoreMergeCandidates(
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int64_t &Offset) -> bool {
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// The memory operands must not be volatile/indexed/atomic.
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// TODO: May be able to relax for unordered atomics (see D66309)
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if (!Other->isSimple() || Other->isIndexed())
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if (!Other->isSimple() || Other->isIndexed())
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return false;
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// Don't mix temporal stores with non-temporal stores.
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if (St->isNonTemporal() != Other->isNonTemporal())
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@ -16195,11 +16195,9 @@ void DAGCombiner::getStoreMergeCandidates(
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auto OverLimitInDependenceCheck = [&](SDNode *StoreNode,
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SDNode *RootNode) -> bool {
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auto RootCount = StoreRootCountMap.find(StoreNode);
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if (RootCount != StoreRootCountMap.end() &&
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RootCount->second.first == RootNode &&
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RootCount->second.second > StoreMergeDependenceLimit)
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return true;
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return false;
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return RootCount != StoreRootCountMap.end() &&
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RootCount->second.first == RootNode &&
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RootCount->second.second > StoreMergeDependenceLimit;
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};
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// We looking for a root node which is an ancestor to all mergable
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