Start of support for binary emit of 16-it Thumb instructions.

llvm-svn: 118859
This commit is contained in:
Jim Grosbach 2010-11-11 23:41:09 +00:00
parent 3d57ee7b43
commit 20b6fd7d5d
2 changed files with 18 additions and 7 deletions

View File

@ -56,10 +56,14 @@ void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
}
bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
if ((Count % 4) != 0) {
// Fixme: % 2 for Thumb?
return false;
}
// if ((Count % 4) != 0) {
// // Fixme: % 2 for Thumb?
// return false;
// }
// FIXME: Zero fill for now. That's not right, but at least will get the
// section size right.
for (uint64_t i = 0; i != Count; ++i)
OW->Write8(0);
return true;
}
} // end anonymous namespace

View File

@ -608,10 +608,17 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups) const {
// Pseudo instructions don't get encoded.
const TargetInstrDesc &Desc = TII.get(MI.getOpcode());
if ((Desc.TSFlags & ARMII::FormMask) == ARMII::Pseudo)
uint64_t TSFlags = Desc.TSFlags;
if ((TSFlags & ARMII::FormMask) == ARMII::Pseudo)
return;
EmitConstant(getBinaryCodeForInstr(MI, Fixups), 4, OS);
int Size;
// Basic size info comes from the TSFlags field.
switch ((TSFlags & ARMII::SizeMask) >> ARMII::SizeShift) {
default: llvm_unreachable("Unexpected instruction size!");
case ARMII::Size2Bytes: Size = 2; break;
case ARMII::Size4Bytes: Size = 4; break;
}
EmitConstant(getBinaryCodeForInstr(MI, Fixups), Size, OS);
++MCNumEmitted; // Keep track of the # of mi's emitted.
}