forked from OSchip/llvm-project
X86: Simplify shuffle mask generation code.
llvm-svn: 149248
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2dcef2d2a8
commit
20af25f47b
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@ -52,6 +52,7 @@
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetOptions.h"
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#include <bitset>
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using namespace llvm;
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using namespace dwarf;
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@ -5259,8 +5260,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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}
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// If element VT is == 32 bits, turn it into a number of shuffles.
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SmallVector<SDValue, 8> V;
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V.resize(NumElems);
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SmallVector<SDValue, 8> V(NumElems);
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if (NumElems == 4 && NumZero > 0) {
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for (unsigned i = 0; i < 4; ++i) {
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bool isZero = !(NonZeros & (1 << i));
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@ -5289,13 +5289,14 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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}
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}
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SmallVector<int, 8> MaskVec;
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bool Reverse = (NonZeros & 0x3) == 2;
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for (unsigned i = 0; i < 2; ++i)
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MaskVec.push_back(Reverse ? 1-i : i);
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Reverse = ((NonZeros & (0x3 << 2)) >> 2) == 2;
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for (unsigned i = 0; i < 2; ++i)
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MaskVec.push_back(Reverse ? 1-i+NumElems : i+NumElems);
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bool Reverse1 = (NonZeros & 0x3) == 2;
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bool Reverse2 = ((NonZeros & (0x3 << 2)) >> 2) == 2;
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int MaskVec[] = {
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Reverse1 ? 1 : 0,
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Reverse1 ? 0 : 1,
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Reverse2 ? 1-NumElems : NumElems,
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Reverse2 ? NumElems : 1+NumElems
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};
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return DAG.getVectorShuffle(VT, dl, V[0], V[1], &MaskVec[0]);
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}
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@ -5497,9 +5498,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op,
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// words from all 4 input quadwords.
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SDValue NewV;
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if (BestLoQuad >= 0 || BestHiQuad >= 0) {
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SmallVector<int, 8> MaskV;
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MaskV.push_back(BestLoQuad < 0 ? 0 : BestLoQuad);
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MaskV.push_back(BestHiQuad < 0 ? 1 : BestHiQuad);
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int MaskV[] = {
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BestLoQuad < 0 ? 0 : BestLoQuad,
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BestHiQuad < 0 ? 1 : BestHiQuad
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};
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NewV = DAG.getVectorShuffle(MVT::v2i64, dl,
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DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1),
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DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V2), &MaskV[0]);
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@ -5602,23 +5604,18 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op,
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// If BestLoQuad >= 0, generate a pshuflw to put the low elements in order,
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// and update MaskVals with new element order.
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BitVector InOrder(8);
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std::bitset<8> InOrder;
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if (BestLoQuad >= 0) {
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SmallVector<int, 8> MaskV;
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int MaskV[] = { -1, -1, -1, -1, 4, 5, 6, 7 };
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for (int i = 0; i != 4; ++i) {
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int idx = MaskVals[i];
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if (idx < 0) {
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MaskV.push_back(-1);
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InOrder.set(i);
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} else if ((idx / 4) == BestLoQuad) {
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MaskV.push_back(idx & 3);
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MaskV[i] = idx & 3;
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InOrder.set(i);
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} else {
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MaskV.push_back(-1);
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}
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}
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for (unsigned i = 4; i != 8; ++i)
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MaskV.push_back(i);
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NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16),
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&MaskV[0]);
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@ -5632,19 +5629,14 @@ X86TargetLowering::LowerVECTOR_SHUFFLEv8i16(SDValue Op,
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// If BestHi >= 0, generate a pshufhw to put the high elements in order,
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// and update MaskVals with the new element order.
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if (BestHiQuad >= 0) {
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SmallVector<int, 8> MaskV;
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for (unsigned i = 0; i != 4; ++i)
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MaskV.push_back(i);
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int MaskV[] = { 0, 1, 2, 3, -1, -1, -1, -1 };
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for (unsigned i = 4; i != 8; ++i) {
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int idx = MaskVals[i];
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if (idx < 0) {
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MaskV.push_back(-1);
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InOrder.set(i);
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} else if ((idx / 4) == BestHiQuad) {
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MaskV.push_back((idx & 3) + 4);
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MaskV[i] = (idx & 3) + 4;
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InOrder.set(i);
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} else {
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MaskV.push_back(-1);
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}
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}
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NewV = DAG.getVectorShuffle(MVT::v8i16, dl, NewV, DAG.getUNDEF(MVT::v8i16),
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@ -6025,9 +6017,8 @@ LowerVECTOR_SHUFFLE_128v4(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
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assert(VT.getSizeInBits() == 128 && "Unsupported vector size");
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SmallVector<std::pair<int, int>, 8> Locs;
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Locs.resize(4);
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SmallVector<int, 8> Mask1(4U, -1);
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std::pair<int, int> Locs[4];
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int Mask1[] = { -1, -1, -1, -1 };
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SmallVector<int, 8> PermMask(SVOp->getMask().begin(), SVOp->getMask().end());
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unsigned NumHi = 0;
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@ -6058,17 +6049,14 @@ LowerVECTOR_SHUFFLE_128v4(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
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// vector operands, put the elements into the right order.
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V1 = DAG.getVectorShuffle(VT, dl, V1, V2, &Mask1[0]);
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SmallVector<int, 8> Mask2(4U, -1);
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int Mask2[] = { -1, -1, -1, -1 };
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for (unsigned i = 0; i != 4; ++i) {
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if (Locs[i].first == -1)
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continue;
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else {
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for (unsigned i = 0; i != 4; ++i)
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if (Locs[i].first != -1) {
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unsigned Idx = (i < 2) ? 0 : 4;
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Idx += Locs[i].first * 2 + Locs[i].second;
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Mask2[i] = Idx;
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}
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}
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return DAG.getVectorShuffle(VT, dl, V1, V1, &Mask2[0]);
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} else if (NumLo == 3 || NumHi == 3) {
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@ -6121,18 +6109,16 @@ LowerVECTOR_SHUFFLE_128v4(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
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}
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// Break it into (shuffle shuffle_hi, shuffle_lo).
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Locs.clear();
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Locs.resize(4);
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SmallVector<int,8> LoMask(4U, -1);
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SmallVector<int,8> HiMask(4U, -1);
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int LoMask[] = { -1, -1, -1, -1 };
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int HiMask[] = { -1, -1, -1, -1 };
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SmallVector<int,8> *MaskPtr = &LoMask;
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int *MaskPtr = LoMask;
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unsigned MaskIdx = 0;
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unsigned LoIdx = 0;
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unsigned HiIdx = 2;
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for (unsigned i = 0; i != 4; ++i) {
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if (i == 2) {
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MaskPtr = &HiMask;
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MaskPtr = HiMask;
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MaskIdx = 1;
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LoIdx = 0;
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HiIdx = 2;
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@ -6142,26 +6128,21 @@ LowerVECTOR_SHUFFLE_128v4(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
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Locs[i] = std::make_pair(-1, -1);
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} else if (Idx < 4) {
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Locs[i] = std::make_pair(MaskIdx, LoIdx);
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(*MaskPtr)[LoIdx] = Idx;
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MaskPtr[LoIdx] = Idx;
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LoIdx++;
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} else {
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Locs[i] = std::make_pair(MaskIdx, HiIdx);
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(*MaskPtr)[HiIdx] = Idx;
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MaskPtr[HiIdx] = Idx;
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HiIdx++;
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}
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}
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SDValue LoShuffle = DAG.getVectorShuffle(VT, dl, V1, V2, &LoMask[0]);
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SDValue HiShuffle = DAG.getVectorShuffle(VT, dl, V1, V2, &HiMask[0]);
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SmallVector<int, 8> MaskOps;
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for (unsigned i = 0; i != 4; ++i) {
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if (Locs[i].first == -1) {
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MaskOps.push_back(-1);
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} else {
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unsigned Idx = Locs[i].first * 4 + Locs[i].second;
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MaskOps.push_back(Idx);
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}
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}
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int MaskOps[] = { -1, -1, -1, -1 };
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for (unsigned i = 0; i != 4; ++i)
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if (Locs[i].first != -1)
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MaskOps[i] = Locs[i].first * 4 + Locs[i].second;
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return DAG.getVectorShuffle(VT, dl, LoShuffle, HiShuffle, &MaskOps[0]);
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}
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