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[XCOFF][AIX] Use TE storage mapping class when large code model is enabled 

Summary:
Use TE SMC instead of TC SMC in large code model mode,
so that large code model TOC entries could get placed after all
the small code model TOC entries, which reduces the chance of TOC overflow.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D85455
This commit is contained in:
jasonliu 2020-08-10 19:35:50 +00:00
parent 7bc03f5553
commit 20abff0481
11 changed files with 56 additions and 34 deletions
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3
llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
View File

@ -251,7 +251,8 @@ public:
MCSection *
getSectionForFunctionDescriptor(const Function *F,
const TargetMachine &TM) const override;
MCSection *getSectionForTOCEntry(const MCSymbol *Sym) const override;
MCSection *getSectionForTOCEntry(const MCSymbol *Sym,
const TargetMachine &TM) const override;
/// For external functions, this will always return a function descriptor
/// csect.

3
llvm/include/llvm/Target/TargetLoweringObjectFile.h
View File

@ -226,7 +226,8 @@ public:
/// On targets that support TOC entries, return a section for the entry given
/// the symbol it refers to.
/// TODO: Implement this interface for existing ELF targets.
virtual MCSection *getSectionForTOCEntry(const MCSymbol *S) const {
virtual MCSection *getSectionForTOCEntry(const MCSymbol *S,
const TargetMachine &TM) const {
return nullptr;
}

7
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
View File

@ -2202,8 +2202,11 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForFunctionDescriptor(
}
MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
const MCSymbol *Sym) const {
const MCSymbol *Sym, const TargetMachine &TM) const {
// Use TE storage-mapping class when large code model is enabled so that
// the chance of needing -bbigtoc is decreased.
return getContext().getXCOFFSection(
cast<MCSymbolXCOFF>(Sym)->getSymbolTableName(), XCOFF::XMC_TC,
cast<MCSymbolXCOFF>(Sym)->getSymbolTableName(),
TM.getCodeModel() == CodeModel::Large ? XCOFF::XMC_TE : XCOFF::XMC_TC,
XCOFF::XTY_SD, XCOFF::C_HIDEXT, SectionKind::getData());
}

1
llvm/lib/MC/MCSectionXCOFF.cpp
View File

@ -45,6 +45,7 @@ void MCSectionXCOFF::PrintSwitchToSection(const MCAsmInfo &MAI, const Triple &T,
printCsectDirective(OS);
break;
case XCOFF::XMC_TC:
case XCOFF::XMC_TE:
break;
case XCOFF::XMC_TC0:
OS << "\t.toc\n";

7
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
View File

@ -20,8 +20,8 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Triple.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDwarf.h"
@ -30,6 +30,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSectionXCOFF.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
@ -122,8 +123,8 @@ public:
void emitTCEntry(const MCSymbol &S) override {
if (const MCSymbolXCOFF *XSym = dyn_cast<MCSymbolXCOFF>(&S)) {
MCSymbolXCOFF *TCSym =
cast<MCSymbolXCOFF>(Streamer.getContext().getOrCreateSymbol(
XSym->getSymbolTableName() + "[TC]"));
cast<MCSectionXCOFF>(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << '\n';
if (TCSym->hasRename())

2
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -1826,7 +1826,7 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
for (auto &I : TOC) {
// Setup the csect for the current TC entry.
MCSectionXCOFF *TCEntry = cast<MCSectionXCOFF>(
getObjFileLowering().getSectionForTOCEntry(I.first));
getObjFileLowering().getSectionForTOCEntry(I.first, TM));
OutStreamer->SwitchSection(TCEntry);
OutStreamer->emitLabel(I.second);

15
llvm/test/CodeGen/PowerPC/aix-lower-block-address.ll
View File

@ -15,16 +15,16 @@
; RUN: --check-prefix=64LARGE-MIR %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck --check-prefixes=32SMALL-ASM,CHECK %s
; RUN: -code-model=small < %s | FileCheck --check-prefixes=32SMALL-ASM,SMALL-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,CHECK %s
; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,LARGE-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck --check-prefixes=64SMALL-ASM,CHECK %s
; RUN: -code-model=small < %s | FileCheck --check-prefixes=64SMALL-ASM,SMALL-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,CHECK %s
; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,LARGE-ASM %s
define void @foo() {
entry:
@ -68,5 +68,8 @@ __here:
; 64LARGE-ASM: addis [[REG1:[0-9]+]], L..C0@u(2)
; 64LARGE-ASM: ld [[REG2:[0-9]+]], L..C0@l([[REG1]])
; CHECK: .toc
; CHECK: .tc L..tmp0[TC],L..tmp0
; SMALL-ASM: .toc
; SMALL-ASM: .tc L..tmp0[TC],L..tmp0
; LARGE-ASM: .toc
; LARGE-ASM: .tc L..tmp0[TE],L..tmp0

15
llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
View File

@ -15,16 +15,16 @@
; RUN: --check-prefix=64LARGE-MIR %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck --check-prefixes=32SMALL-ASM,CHECK %s
; RUN: -code-model=small < %s | FileCheck --check-prefixes=32SMALL-ASM,SMALL-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,CHECK %s
; RUN: -code-model=large < %s | FileCheck --check-prefixes=32LARGE-ASM,LARGE-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck --check-prefixes=64SMALL-ASM,CHECK %s
; RUN: -code-model=small < %s | FileCheck --check-prefixes=64SMALL-ASM,SMALL-ASM %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,CHECK %s
; RUN: -code-model=large < %s | FileCheck --check-prefixes=64LARGE-ASM,LARGE-ASM %s
define float @test_float() {
entry:
@ -83,5 +83,8 @@ entry:
; 64LARGE-ASM: lfs 1, 0([[REG2]])
; 64LARGE-ASM: blr
; CHECK: .toc
; CHECK: .tc L..CPI0_0[TC],L..CPI0_0
; SMALL-ASM: .toc
; SMALL-ASM: .tc L..CPI0_0[TC],L..CPI0_0
; LARGE-ASM: .toc
; LARGE-ASM: .tc L..CPI0_0[TE],L..CPI0_0

15
llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
View File

@ -15,16 +15,16 @@
; RUN: --check-prefix=64LARGE-MIR %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=small < %s | FileCheck \
; RUN: --check-prefixes=32SMALL-ASM,CHECK %s
; RUN: --check-prefixes=32SMALL-ASM,SMALL-ASM %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large < %s | FileCheck \
; RUN: --check-prefixes=32LARGE-ASM,CHECK %s
; RUN: --check-prefixes=32LARGE-ASM,LARGE-ASM %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=small < %s | FileCheck \
; RUN: --check-prefixes=64SMALL-ASM,CHECK %s
; RUN: --check-prefixes=64SMALL-ASM,SMALL-ASM %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large < %s | FileCheck \
; RUN: --check-prefixes=64LARGE-ASM,CHECK %s
; RUN: --check-prefixes=64LARGE-ASM,LARGE-ASM %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -function-sections < %s | FileCheck \
; RUN: --check-prefixes=FUNC-ASM,CHECK %s
@ -206,5 +206,8 @@
; FUNC-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; FUNC-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
; CHECK: .toc
; CHECK: .tc L..JTI0_0[TC],L..JTI0_0
; SMALL-ASM: .toc
; SMALL-ASM: .tc L..JTI0_0[TC],L..JTI0_0
; LARGE-ASM: .toc
; LARGE-ASM: .tc L..JTI0_0[TE],L..JTI0_0

11
llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,SMALL
; RUN: -code-model=small < %s | FileCheck %s --check-prefix=SMALL
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE
; RUN: -code-model=large < %s | FileCheck %s --check-prefix=LARGE
@a = common global i32 0
@ -41,5 +41,8 @@ define void @test_store(i32 %0) {
; LARGE: stw [[REG3:[0-9]+]], 0([[REG2]])
; LARGE: blr
; CHECK: .tc a[TC],a
; CHECK: .tc b[TC],b
; SMALL: .tc a[TC],a
; SMALL: .tc b[TC],b
; LARGE: .tc a[TE],a
; LARGE: .tc b[TE],b

11
llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,SMALL
; RUN: -code-model=small < %s | FileCheck %s --check-prefix=SMALL
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE
; RUN: -code-model=large < %s | FileCheck %s --check-prefix=LARGE
@a = common global i32 0
@ -41,5 +41,8 @@ define void @test_store(i32 zeroext %0) {
; LARGE: stw [[REG3:[0-9]+]], 0([[REG2]])
; LARGE: blr
; CHECK: .tc a[TC],a
; CHECK: .tc b[TC],b
; SMALL: .tc a[TC],a
; SMALL: .tc b[TC],b
; LARGE: .tc a[TE],a
; LARGE: .tc b[TE],b