forked from OSchip/llvm-project
ARM before armv6 did not supprt 'rev' instruction
llvm-svn: 107548
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@ -16,8 +16,28 @@
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//
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.align 2
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DEFINE_COMPILERRT_FUNCTION(__bswapdi2)
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#if __ARM_ARCH_5TEJ__ || __ARM_ARCH_4T__
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// before armv6 does not have "rev" instruction
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stmfd sp!, {r7, lr}
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mov r7, sp
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mov r2, #255, 24
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and r3, r2, r1, lsr #8
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mov r12, #255, 16
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and lr, r12, r1, lsl #8
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orr r3, r3, r1, lsr #24
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orr r1, lr, r1, lsl #24
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and r2, r2, r0, lsr #8
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orr r3, r1, r3
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orr r1, r2, r0, lsr #24
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and r2, r12, r0, lsl #8
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orr r0, r2, r0, lsl #24
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orr r1, r0, r1
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mov r0, r3
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ldmfd sp!, {r7, pc}
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#else
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rev r2, r1 // reverse bytes in high 32-bits into temp2
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rev r3, r0 // reverse bytes in low 32-bit into temp3
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mov r0, r2 // set low 32-bits of result to temp2
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mov r1, r3 // set high 32-bits of result to temp3
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bx lr
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#endif
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@ -16,5 +16,16 @@
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//
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.align 2
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DEFINE_COMPILERRT_FUNCTION(__bswapsi2)
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#if __ARM_ARCH_5TEJ__ || __ARM_ARCH_4T__
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// before armv6 does not have "rev" instruction
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mov r1, #255, 24
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mov r2, #255, 16
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and r1, r1, r0, lsr #8
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and r2, r2, r0, lsl #8
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orr r1, r1, r0, lsr #24
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orr r0, r2, r0, lsl #24
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orr r0, r0, r1
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#else
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rev r0, r0 // reverse bytes in parameter and put into result register
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#endif
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bx lr
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