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ARM: mark UBFX as not allowing PC. 

Strictly, it's unpredictable. But we don't quite model that yet and an error is
better than ignoring the issue. This one somehow got left out before though.

rdar://problem/15997748

llvm-svn: 211490
This commit is contained in:
Tim Northover 2014-06-23 09:20:02 +00:00
parent cefffaeeca
commit 2099862a50
2 changed files with 20 additions and 2 deletions
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4
llvm/lib/Target/ARM/ARMInstrInfo.td
View File

@ -3334,8 +3334,8 @@ def SBFX : I<(outs GPRnopc:$Rd),
let Inst{3-0} = Rn;
}
def UBFX : I<(outs GPR:$Rd),
(ins GPR:$Rn, imm0_31:$lsb, imm1_32:$width),
def UBFX : I<(outs GPRnopc:$Rd),
(ins GPRnopc:$Rn, imm0_31:$lsb, imm1_32:$width),
AddrMode1, 4, IndexModeNone, DPFrm, IIC_iUNAsi,
"ubfx", "\t$Rd, $Rn, $lsb, $width", "", []>,
Requires<[IsARM, HasV6T2]> {

18
llvm/test/MC/ARM/diagnostics.s
View File

@ -351,6 +351,24 @@
@ CHECK-ERRORS: ubfxgt r4, r5, #16, #17
@ CHECK-ERRORS: ^
@ Using pc for SBFX/UBFX
sbfx pc, r2, #1, #3
sbfx sp, pc, #4, #5
ubfx pc, r0, #0, #31
ubfx r14, pc, #1, #2
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: sbfx pc, r2, #1, #3
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: sbfx sp, pc, #4, #5
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: ubfx pc, r0, #0, #31
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: ubfx r14, pc, #1, #2
@ CHECK-ERRORS: ^
@ Out of order Rt/Rt2 operands for ldrd
ldrd r4, r3, [r8]
ldrd r4, r3, [r8, #8]!