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[InstCombine] Move (0 - x) & 1 --> x & 1 to SimplifyDemandedUseBits. 

This removes a dedicated matcher and allows us to support more than just an AND masking the lower bit.

llvm-svn: 308124
This commit is contained in:
Craig Topper 2017-07-16 05:37:58 +00:00
parent 923ddad4c6
commit 2072aca51c
2 changed files with 5 additions and 7 deletions
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6
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
View File

@ -1285,13 +1285,9 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
return replaceInstUsesWith(I, V);
if (match(Op1, m_One())) {
Value *X;
// (0 - x) & 1 --> x & 1
if (match(Op0, m_Sub(m_Zero(), m_Value(X))))
return BinaryOperator::CreateAnd(X, Op1);
// (1 << x) & 1 --> zext(x == 0)
// (1 >> x) & 1 --> zext(x == 0)
Value *X;
if (match(Op0, m_OneUse(m_LogicalShift(m_One(), m_Value(X))))) {
Value *IsZero = Builder.CreateICmpEQ(X, ConstantInt::get(I.getType(), 0));
return new ZExtInst(IsZero, I.getType());

6
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
View File

@ -417,8 +417,10 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
// the highest demanded bit, we just return the other side.
if (DemandedFromOps.isSubsetOf(RHSKnown.Zero))
return I->getOperand(0);
// We can't do this with the LHS for subtraction.
if (I->getOpcode() == Instruction::Add &&
// We can't do this with the LHS for subtraction, unless we are only
// demanding the LSB.
if ((I->getOpcode() == Instruction::Add ||
DemandedFromOps.isOneValue()) &&
DemandedFromOps.isSubsetOf(LHSKnown.Zero))
return I->getOperand(1);
}