forked from OSchip/llvm-project
Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
llvm-svn: 148240
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@ -551,7 +551,7 @@ def ATOMSWAP6432 : I<0, Pseudo, (outs GR32:$dst1, GR32:$dst2),
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// Memory barriers
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// TODO: Get this to fold the constant into the instruction.
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let isCodeGenOnly = 1 in
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let isCodeGenOnly = 1, Defs = [EFLAGS] in
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def OR32mrLocked : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero),
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"lock\n\t"
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"or{l}\t{$zero, $dst|$dst, $zero}",
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@ -0,0 +1,34 @@
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; RUN: llc < %s -mtriple=i686-linux -mattr=-sse | FileCheck %s
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; PR11768
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@ptr = external global i8*
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define void @baz() nounwind ssp {
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entry:
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%0 = load i8** @ptr, align 4
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%cmp = icmp eq i8* %0, null
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fence seq_cst
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br i1 %cmp, label %if.then, label %if.else
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; Make sure the fence comes before the comparison, since it
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; clobbers EFLAGS.
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; CHECK: lock
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; CHECK-NEXT: orl {{.*}}, (%esp)
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; CHECK-NEXT: cmpl $0
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if.then: ; preds = %entry
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tail call void bitcast (void (...)* @foo to void ()*)() nounwind
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br label %if.end
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if.else: ; preds = %entry
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tail call void bitcast (void (...)* @bar to void ()*)() nounwind
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret void
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}
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declare void @foo(...)
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declare void @bar(...)
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