forked from OSchip/llvm-project
AMDGPU: split ret/noret patterns for global atomics
Differential Revision: https://reviews.llvm.org/D27989 llvm-svn: 290435
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@ -363,24 +363,54 @@ multiclass AtomicCmpSwapLocal <SDNode cmp_swap_node> {
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defm atomic_cmp_swap : AtomicCmpSwapLocal <atomic_cmp_swap>;
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class global_binary_atomic_op<SDNode atomic_op> : PatFrag<
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(ops node:$ptr, node:$value),
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(atomic_op node:$ptr, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]
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>;
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multiclass global_binary_atomic_op<SDNode atomic_op> {
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def "" : PatFrag<
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(ops node:$ptr, node:$value),
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(atomic_op node:$ptr, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>;
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def atomic_swap_global : global_binary_atomic_op<atomic_swap>;
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def atomic_add_global : global_binary_atomic_op<atomic_load_add>;
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def atomic_and_global : global_binary_atomic_op<atomic_load_and>;
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def atomic_max_global : global_binary_atomic_op<atomic_load_max>;
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def atomic_min_global : global_binary_atomic_op<atomic_load_min>;
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def atomic_or_global : global_binary_atomic_op<atomic_load_or>;
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def atomic_sub_global : global_binary_atomic_op<atomic_load_sub>;
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def atomic_umax_global : global_binary_atomic_op<atomic_load_umax>;
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def atomic_umin_global : global_binary_atomic_op<atomic_load_umin>;
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def atomic_xor_global : global_binary_atomic_op<atomic_load_xor>;
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def _noret : PatFrag<
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(ops node:$ptr, node:$value),
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(atomic_op node:$ptr, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty());}]>;
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def atomic_cmp_swap_global : global_binary_atomic_op<AMDGPUatomic_cmp_swap>;
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def _ret : PatFrag<
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(ops node:$ptr, node:$value),
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(atomic_op node:$ptr, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_empty());}]>;
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}
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defm atomic_swap_global : global_binary_atomic_op<atomic_swap>;
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defm atomic_add_global : global_binary_atomic_op<atomic_load_add>;
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defm atomic_and_global : global_binary_atomic_op<atomic_load_and>;
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defm atomic_max_global : global_binary_atomic_op<atomic_load_max>;
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defm atomic_min_global : global_binary_atomic_op<atomic_load_min>;
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defm atomic_or_global : global_binary_atomic_op<atomic_load_or>;
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defm atomic_sub_global : global_binary_atomic_op<atomic_load_sub>;
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defm atomic_umax_global : global_binary_atomic_op<atomic_load_umax>;
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defm atomic_umin_global : global_binary_atomic_op<atomic_load_umin>;
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defm atomic_xor_global : global_binary_atomic_op<atomic_load_xor>;
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//legacy
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def AMDGPUatomic_cmp_swap_global : PatFrag<
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(ops node:$ptr, node:$value),
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(AMDGPUatomic_cmp_swap node:$ptr, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>;
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def atomic_cmp_swap_global : PatFrag<
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(ops node:$ptr, node:$cmp, node:$value),
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(atomic_cmp_swap node:$ptr, node:$cmp, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}]>;
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def atomic_cmp_swap_global_noret : PatFrag<
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(ops node:$ptr, node:$cmp, node:$value),
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(atomic_cmp_swap node:$ptr, node:$cmp, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (SDValue(N, 0).use_empty());}]>;
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def atomic_cmp_swap_global_ret : PatFrag<
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(ops node:$ptr, node:$cmp, node:$value),
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(atomic_cmp_swap node:$ptr, node:$cmp, node:$value),
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[{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && (!SDValue(N, 0).use_empty());}]>;
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//===----------------------------------------------------------------------===//
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// Misc Pattern Fragments
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@ -372,7 +372,7 @@ def : FlatAtomicPat <FLAT_ATOMIC_SMIN_RTN, atomic_min_global, i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_UMIN_RTN, atomic_umin_global, i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_OR_RTN, atomic_or_global, i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_SWAP_RTN, atomic_swap_global, i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_RTN, atomic_cmp_swap_global, i32, v2i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_RTN, AMDGPUatomic_cmp_swap_global, i32, v2i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_XOR_RTN, atomic_xor_global, i32>;
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def : FlatAtomicPat <FLAT_ATOMIC_ADD_X2_RTN, atomic_add_global, i64>;
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@ -386,7 +386,7 @@ def : FlatAtomicPat <FLAT_ATOMIC_SMIN_X2_RTN, atomic_min_global, i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_UMIN_X2_RTN, atomic_umin_global, i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_OR_X2_RTN, atomic_or_global, i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_SWAP_X2_RTN, atomic_swap_global, i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_X2_RTN, atomic_cmp_swap_global, i64, v2i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_CMPSWAP_X2_RTN, AMDGPUatomic_cmp_swap_global, i64, v2i64>;
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def : FlatAtomicPat <FLAT_ATOMIC_XOR_X2_RTN, atomic_xor_global, i64>;
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} // End Predicates = [isCIVI]
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@ -94,8 +94,8 @@ def SIpc_add_rel_offset : SDNode<"AMDGPUISD::PC_ADD_REL_OFFSET",
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// PatFrags for global memory operations
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//===----------------------------------------------------------------------===//
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def atomic_inc_global : global_binary_atomic_op<SIatomic_inc>;
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def atomic_dec_global : global_binary_atomic_op<SIatomic_dec>;
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defm atomic_inc_global : global_binary_atomic_op<SIatomic_inc>;
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defm atomic_dec_global : global_binary_atomic_op<SIatomic_dec>;
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//===----------------------------------------------------------------------===//
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// SDNodes and PatFrag for local loads and stores to enable s_mov_b32 m0, -1
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