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[mips][FastISel] Remove hidden mips-fast-isel option. 

Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.

Reviewers: dsanders

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D11610

llvm-svn: 243638
This commit is contained in:
Vasileios Kalintiris 2015-07-30 12:39:33 +00:00
parent d00438e8f0
commit 2041b1dd0b
30 changed files with 63 additions and 68 deletions
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8
llvm/lib/Target/Mips/MipsISelLowering.cpp
View File

@ -27,6 +27,7 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/CallingConv.h"
@ -53,11 +54,6 @@ NoZeroDivCheck("mno-check-zero-division", cl::Hidden,
cl::desc("MIPS: Don't trap on integer division by zero."),
cl::init(false));
cl::opt<bool>
EnableMipsFastISel("mips-fast-isel", cl::Hidden,
cl::desc("Allow mips-fast-isel to be used"),
cl::init(false));
static const MCPhysReg Mips64DPRegs[8] = {
Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,
Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
@ -461,7 +457,7 @@ const MipsTargetLowering *MipsTargetLowering::create(const MipsTargetMachine &TM
FastISel *
MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const {
if (!EnableMipsFastISel)
if (!funcInfo.MF->getTarget().Options.EnableFastISel)
return TargetLowering::createFastISel(funcInfo, libInfo);
return Mips::createFastISel(funcInfo, libInfo);
}

4
llvm/test/CodeGen/Mips/Fast-ISel/br1.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@b = global i32 1, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/bswap1.ll
View File

@ -1,8 +1,8 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
; RUN: -fast-isel-abort=1 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R1
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
; RUN: -fast-isel-abort=1 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R2
@a = global i16 -21829, align 2

4
llvm/test/CodeGen/Mips/Fast-ISel/callabi.ll
View File

@ -1,8 +1,8 @@
; RUN: llc -march=mipsel -mcpu=mips32 -O0 \
; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \
; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \
; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R1
; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 \
; RUN: -mips-fast-isel -relocation-model=pic -fast-isel-abort=1 < %s | \
; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \
; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R2
declare void @xb(i8)

4
llvm/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll
View File

@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s
; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
; RUN: llc -march=mipsel -mcpu=mips32r2 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 < %s | FileCheck %s
; RUN: -fast-isel=true -fast-isel-abort=1 < %s | FileCheck %s
@ARR = external global [10 x i32], align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/div1.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s
; RUN: -fast-isel-abort=1 | FileCheck %s
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s
; RUN: -fast-isel-abort=1 | FileCheck %s
@sj = global i32 200000, align 4
@sk = global i32 -47, align 4

2
llvm/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
%struct.x = type { i32 }

3
llvm/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll
View File

@ -1,6 +1,5 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-verbose 2>&1 | \
; RUN: FileCheck %s
; RUN: -fast-isel-verbose 2>&1 | FileCheck %s
; CHECK: FastISel missed call:
; CHECK-SAME: %call = call fastcc i32 @foo(i32 signext %a, i32 signext %b)

4
llvm/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@f1 = common global float 0.000000e+00, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/fpext.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@f = global float 0x40147E6B80000000, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s

4
llvm/test/CodeGen/Mips/Fast-ISel/fptrunc.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@d = global double 0x40147E6B74DF0446, align 8

4
llvm/test/CodeGen/Mips/Fast-ISel/icmpa.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@c = global i32 4, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
View File

@ -4,9 +4,9 @@ target triple = "mips--linux-gnu"
@c2 = common global i8 0, align 1
@c1 = common global i8 0, align 1
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@s2 = common global i16 0, align 2

8
llvm/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll
View File

@ -1,10 +1,10 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s -check-prefix=mips32r2
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s -check-prefix=mips32
@b2 = global i8 0, align 1

4
llvm/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@.str = private unnamed_addr constant [6 x i8] c"hello\00", align 1

4
llvm/test/CodeGen/Mips/Fast-ISel/logopm.ll
View File

@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s
@ub1 = common global i8 0, align 1
@ub2 = common global i8 0, align 1

4
llvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll
View File

@ -1,8 +1,8 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
; RUN: -fast-isel-abort=1 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R1
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s \
; RUN: -fast-isel-abort=1 | FileCheck %s \
; RUN: -check-prefix=ALL -check-prefix=32R2
@str = private unnamed_addr constant [12 x i8] c"hello there\00", align 1

6
llvm/test/CodeGen/Mips/Fast-ISel/mul1.ll
View File

@ -1,7 +1,5 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 \
; RUN: -fast-isel -mips-fast-isel -relocation-model=pic
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 \
; RUN: -fast-isel -mips-fast-isel -relocation-model=pic
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic
; The test is just to make sure it is able to allocate
; registers for this example. There was an issue with allocating AC0

4
llvm/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
; Function Attrs: nounwind

4
llvm/test/CodeGen/Mips/Fast-ISel/overflt.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@x = common global [128000 x float] zeroinitializer, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/rem1.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s
; RUN: -fast-isel-abort=1 | FileCheck %s
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \
; RUN: -fast-isel=true -mips-fast-isel -fast-isel-abort=1 | FileCheck %s
; RUN: -fast-isel-abort=1 | FileCheck %s
@sj = global i32 200, align 4
@sk = global i32 -47, align 4

2
llvm/test/CodeGen/Mips/Fast-ISel/retabi.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
@i = global i32 75, align 4

2
llvm/test/CodeGen/Mips/Fast-ISel/sel1.ll
View File

@ -1,5 +1,5 @@
; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O2 -relocation-model=pic \
; RUN: -fast-isel -mips-fast-isel -fast-isel-abort=1 | FileCheck %s
; RUN: -fast-isel -fast-isel-abort=1 | FileCheck %s
define i1 @sel_i1(i1 %j, i1 %k, i1 %l) {
entry:

4
llvm/test/CodeGen/Mips/Fast-ISel/shftopm.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel \
; RUN: llc -march=mipsel -relocation-model=pic -O0 \
; RUN: -fast-isel-abort=1 -mcpu=mips32r2 < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel \
; RUN: llc -march=mipsel -relocation-model=pic -O0 \
; RUN: -fast-isel-abort=1 -mcpu=mips32 < %s | FileCheck %s
@s1 = global i16 -89, align 2

2
llvm/test/CodeGen/Mips/Fast-ISel/shift.ll
View File

@ -1,4 +1,4 @@
; RUN: llc -march=mipsel -mcpu=mips32r2 -O1 -fast-isel=true -mips-fast-isel -filetype=obj %s -o - \
; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -fast-isel=true -filetype=obj %s -o - \
; RUN: | llvm-objdump -arch mipsel -mcpu=mips32r2 -d - | FileCheck %s
; This test checks that encoding for srl is correct when fast-isel for mips32r2 is used.

4
llvm/test/CodeGen/Mips/Fast-ISel/simplestore.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@abcd = external global i32

8
llvm/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
View File

@ -1,10 +1,10 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s -check-prefix=mips32r2
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s -check-prefix=mips32
@f = common global float 0.000000e+00, align 4

4
llvm/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort=1 -mcpu=mips32 \
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
@ijk = external global i32

10
llvm/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
View File

@ -1,10 +1,10 @@
; Check that register scavenging spill slot is close to $fp.
; RUN: llc -march=mipsel -O0 < %s | FileCheck %s
; RUN: llc -march=mipsel -O0 -fast-isel=false < %s | FileCheck %s
; CHECK: sw ${{.*}}, 4($sp)
; CHECK: lw ${{.*}}, 4($sp)
; CHECK: sw ${{.*}}, 8($sp)
; CHECK: lw ${{.*}}, 8($sp)
define i32 @main(i32 signext %argc, i8** %argv) "no-frame-pointer-elim"="true" {
define i32 @main(i32 signext %argc, i8** %argv) #0 {
entry:
%retval = alloca i32, align 4
%argc.addr = alloca i32, align 4
@ -30,3 +30,5 @@ entry:
store <16 x i8> %mul, <16 x i8>* %result, align 16
ret i32 0
}
attributes #0 = { noinline optnone "no-frame-pointer-elim"="true" }