llvm-reduce: Add pass to reduce MIR instruction flags

llvm/test/tools/llvm-reduce/mir/reduce-instruction-flags.mir

@@ -0,0 +1,54 @@
+# REQUIRES: amdgpu-registered-target
+# RUN: llvm-reduce -simplify-mir -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
+# RUN: FileCheck --check-prefix=RESULT %s < %t
+
+# CHECK-INTERESTINGNESS: V_ADD_F32
+# CHECK-INTERESTINGNESS: nnan nofpexcept V_MUL_F32
+
+# CHECK-INTERESTINGNESS-COUNT-11: V_MOV_B32
+
+
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_e32 %{{[0-9]+}}, %{{[0-9]+}}, implicit $mode, implicit $exec
+# RESULT: %{{[0-9]+}}:vgpr_32 = nnan nofpexcept V_MUL_F32_e32 0, %{{[0-9]+}}, implicit $mode, implicit $exec
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+# RESULT: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32
+
+---
+name: func
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0, $vgpr1
+
+    S_WAITCNT 0
+    %0:vgpr_32 = COPY $vgpr0
+    %1:vgpr_32 = COPY $vgpr1
+    %2:vgpr_32 = nofpexcept V_ADD_F32_e32 %0, %1, implicit $mode, implicit $exec
+    %3:vgpr_32 = nnan nofpexcept V_MUL_F32_e32 0, %2, implicit $mode, implicit $exec
+    %4:vgpr_32 = nsz V_MUL_F32_e32 0, %3, implicit $mode, implicit $exec
+
+    %5:vgpr_32 = nnan V_MOV_B32_e32 0, implicit $exec
+    %6:vgpr_32 = ninf V_MOV_B32_e32 0, implicit $exec
+    %7:vgpr_32 = nsz V_MOV_B32_e32 0, implicit $exec
+    %8:vgpr_32 = arcp V_MOV_B32_e32 0, implicit $exec
+    %9:vgpr_32 = contract V_MOV_B32_e32 0, implicit $exec
+    %10:vgpr_32 = afn V_MOV_B32_e32 0, implicit $exec
+    %11:vgpr_32 = reassoc V_MOV_B32_e32 0, implicit $exec
+    %12:vgpr_32 = nuw V_MOV_B32_e32 0, implicit $exec
+    %13:vgpr_32 = nsw V_MOV_B32_e32 0, implicit $exec
+    %14:vgpr_32 = exact V_MOV_B32_e32 0, implicit $exec
+    %15:vgpr_32 = nofpexcept V_MOV_B32_e32 0, implicit $exec
+    S_NOP 0, implicit %3, implicit %4, implicit %5, implicit %6, implicit %7
+    S_NOP 0, implicit %8, implicit %9, implicit %10, implicit %11, implicit %12
+    S_ENDPGM 0, implicit %13, implicit %14, implicit %15
+...
+

llvm/tools/llvm-reduce/CMakeLists.txt

@@ -39,6 +39,7 @@ add_llvm_tool(llvm-reduce
   deltas/ReduceOperandsSkip.cpp
   deltas/ReduceOperandsToArgs.cpp
   deltas/ReduceInstructionsMIR.cpp
+  deltas/ReduceInstructionFlagsMIR.cpp
   deltas/ReduceIRReferences.cpp
   llvm-reduce.cpp
 

llvm/tools/llvm-reduce/DeltaManager.cpp

@@ -25,6 +25,7 @@
 #include "deltas/ReduceGlobalVarInitializers.h"
 #include "deltas/ReduceGlobalVars.h"
 #include "deltas/ReduceIRReferences.h"
+#include "deltas/ReduceInstructionFlagsMIR.h"
 #include "deltas/ReduceInstructions.h"
 #include "deltas/ReduceInstructionsMIR.h"
 #include "deltas/ReduceMetadata.h"
@@ -72,7 +73,8 @@ static cl::opt<std::string>
   DELTA_PASS("ir-instruction-references",                                      \
              reduceIRInstructionReferencesDeltaPass)                           \
   DELTA_PASS("ir-block-references", reduceIRBlockReferencesDeltaPass)          \
-  DELTA_PASS("ir-function-references", reduceIRFunctionReferencesDeltaPass)
+  DELTA_PASS("ir-function-references", reduceIRFunctionReferencesDeltaPass)    \
+  DELTA_PASS("instruction-flags", reduceInstructionFlagsMIRDeltaPass)
 
 static void runAllDeltaPasses(TestRunner &Tester) {
 #define DELTA_PASS(NAME, FUNC) FUNC(Tester);

llvm/tools/llvm-reduce/deltas/ReduceInstructionFlagsMIR.cpp

@@ -0,0 +1,35 @@
+//===- ReduceInstructionFlagsMIR.cpp - Specialized Delta Pass -------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a function which calls the Generic Delta pass in order
+// to reduce uninteresting MachineInstr flags from the MachineFunction.
+//
+//===----------------------------------------------------------------------===//
+
+#include "ReduceInstructionFlagsMIR.h"
+#include "llvm/CodeGen/MachineFunction.h"
+using namespace llvm;
+
+static void removeFlagsFromModule(Oracle &O, ReducerWorkItem &WorkItem) {
+  for (const Function &F : WorkItem.getModule()) {
+    if (auto *MF = WorkItem.MMI->getMachineFunction(F)) {
+      for (MachineBasicBlock &MBB : *MF) {
+        for (MachineInstr &MI : MBB) {
+          // TODO: Should this clear flags individually?
+          if (MI.getFlags() != 0 && !O.shouldKeep())
+            MI.setFlags(0);
+        }
+      }
+    }
+  }
+}
+
+void llvm::reduceInstructionFlagsMIRDeltaPass(TestRunner &Test) {
+  outs() << "*** Reducing Instruction flags...\n";
+  runDeltaPass(Test, removeFlagsFromModule);
+}

llvm/tools/llvm-reduce/deltas/ReduceInstructionFlagsMIR.h

@@ -0,0 +1,23 @@
+//===- ReduceInstructionFlagsMIR.h  - Specialized Delta Pass --------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements a function which calls the Generic Delta pass in order
+// to reduce uninteresting MachineInstr flags from the MachineFunction.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TOOLS_LLVM_REDUCE_DELTAS_REDUCEINSTRUCTIONFLAGSMIR_H
+#define LLVM_TOOLS_LLVM_REDUCE_DELTAS_REDUCEINSTRUCTIONFLAGSMIR_H
+
+#include "Delta.h"
+
+namespace llvm {
+void reduceInstructionFlagsMIRDeltaPass(TestRunner &Test);
+} // namespace llvm
+
+#endif