forked from OSchip/llvm-project
[X86] Pre-commit i64 volatile test case for D60156. NFC
llvm-svn: 358210
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@ -90,3 +90,35 @@ define i64 @test3(i64* %ptr) noimplicitfloat {
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%val = load atomic i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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define i64 @test4(i64* %ptr) {
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; SSE42-LABEL: test4:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; SSE42-NEXT: movd %xmm0, %eax
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; SSE42-NEXT: pextrd $1, %xmm0, %edx
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; SSE42-NEXT: retl
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;
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; NOSSE-LABEL: test4:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebx
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: pushl %esi
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; NOSSE-NEXT: .cfi_def_cfa_offset 12
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; NOSSE-NEXT: .cfi_offset %esi, -12
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; NOSSE-NEXT: .cfi_offset %ebx, -8
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; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi
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; NOSSE-NEXT: xorl %eax, %eax
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; NOSSE-NEXT: xorl %edx, %edx
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; NOSSE-NEXT: xorl %ecx, %ecx
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; NOSSE-NEXT: xorl %ebx, %ebx
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; NOSSE-NEXT: lock cmpxchg8b (%esi)
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; NOSSE-NEXT: popl %esi
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; NOSSE-NEXT: .cfi_def_cfa_offset 8
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; NOSSE-NEXT: popl %ebx
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; NOSSE-NEXT: .cfi_def_cfa_offset 4
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; NOSSE-NEXT: retl
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%val = load atomic volatile i64, i64* %ptr seq_cst, align 8
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ret i64 %val
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}
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