From 1fcdc23a6e7b1f7fad79f9c924958b9c16e6ee1f Mon Sep 17 00:00:00 2001
From: Saleem Abdulrasool <compnerd@compnerd.org>
Date: Sat, 4 Jun 2016 18:27:22 +0000
Subject: [PATCH] X86: enable TLS on Windows itanium

Windows itanium is nearly identical to windows-msvc (MS ABI for C, itanium for
C++).  Enable the TLS support for the target similar to the MSVC model.

llvm-svn: 271797
---
 llvm/lib/Target/X86/X86ISelLowering.cpp      |  1 +
 llvm/test/CodeGen/X86/tls-windows-itanium.ll | 30 ++++++++++++++++++++
 2 files changed, 31 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/tls-windows-itanium.ll

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f65dcfbee6a5..3bc56442ebbc 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -12975,6 +12975,7 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
   }
 
   if (Subtarget.isTargetKnownWindowsMSVC() ||
+      Subtarget.isTargetWindowsItanium() ||
       Subtarget.isTargetWindowsGNU()) {
     // Just use the implicit TLS architecture
     // Need to generate someting similar to:
diff --git a/llvm/test/CodeGen/X86/tls-windows-itanium.ll b/llvm/test/CodeGen/X86/tls-windows-itanium.ll
new file mode 100644
index 000000000000..20ac09901969
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tls-windows-itanium.ll
@@ -0,0 +1,30 @@
+; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-ASM
+; RUN: llc -mtriple i686-windows-itanium -filetype obj -o - %s | llvm-readobj -relocations - | FileCheck %s -check-prefix CHECK-OBJ
+
+@get_count_incremented.count = internal thread_local unnamed_addr global i32 0, align 4
+
+define i32 @get_count_incremented() {
+entry:
+  %0 = load i32, i32* @get_count_incremented.count, align 4
+  %inc = add i32 %0, 1
+  store i32 %inc, i32* @get_count_incremented.count, align 4
+  ret i32 %inc
+}
+
+; CHECK-ASM-LABEL: _get_count_incremented:
+; CHECK-ASM: movl __tls_index, %eax
+; CHECK-ASM: movl %fs:__tls_array, %ecx
+; CHECK-ASM: movl (%ecx,%eax,4), %ecx
+; CHECK-ASM: _get_count_incremented.count@SECREL32(%ecx), %eax
+; CHECK-ASM: incl %eax
+; CHECK-ASM: movl %eax, _get_count_incremented.count@SECREL32(%ecx)
+; CHECK-ASM: retl
+
+; CHECK-OBJ: Relocations [
+; CHECK-OBJ:   Section ({{[0-9]+}}) .text {
+; CHECK-OBJ:     0x1 IMAGE_REL_I386_DIR32 __tls_index
+; CHECK-OBJ:     0x8 IMAGE_REL_I386_DIR32 __tls_array
+; CHECK-OBJ:     0x11 IMAGE_REL_I386_SECREL _get_count_incremented.count
+; CHECK-OBJ:     0x18 IMAGE_REL_I386_SECREL _get_count_incremented.count
+; CHECK-OBJ:   }
+; CHECK-OBJ: ]