forked from OSchip/llvm-project
Revert "Recommit "[SCEV] Look through single value PHIs." (take 2)"
This reverts commit 764d9aa979
.
This patch exposed a few additional cases where SCEV expressions are not
properly invalidated.
See PR52024, PR52023.
This commit is contained in:
parent
d81723c99b
commit
1fbdbb5595
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@ -5631,8 +5631,13 @@ const SCEV *ScalarEvolution::createNodeForPHI(PHINode *PN) {
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if (const SCEV *S = createNodeFromSelectLikePHI(PN))
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if (const SCEV *S = createNodeFromSelectLikePHI(PN))
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return S;
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return S;
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// If the PHI has a single incoming value, follow that value, unless the
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// PHI's incoming blocks are in a different loop, in which case doing so
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// risks breaking LCSSA form. Instcombine would normally zap these, but
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// it doesn't have DominatorTree information, so it may miss cases.
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if (Value *V = SimplifyInstruction(PN, {getDataLayout(), &TLI, &DT, &AC}))
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if (Value *V = SimplifyInstruction(PN, {getDataLayout(), &TLI, &DT, &AC}))
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return getSCEV(V);
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if (LI.replacementPreservesLCSSAForm(PN, V))
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return getSCEV(V);
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// If it's not a loop phi, we can't handle it yet.
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// If it's not a loop phi, we can't handle it yet.
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return getUnknown(PN);
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return getUnknown(PN);
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@ -2,7 +2,7 @@
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; RUN: "-aa-pipeline=basic-aa,tbaa" 2>&1 | FileCheck %s
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; RUN: "-aa-pipeline=basic-aa,tbaa" 2>&1 | FileCheck %s
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; CHECK: Src: %v = load i32, i32* %arrayidx1, align 4 --> Dst: store i32 %add, i32* %a.lcssa, align 4
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; CHECK: Src: %v = load i32, i32* %arrayidx1, align 4 --> Dst: store i32 %add, i32* %a.lcssa, align 4
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; CHECK-NEXT: da analyze - anti [*|<]!
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; CHECK-NEXT: da analyze - confused!
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define void @f(i32 *%a, i32 %n, i64 %n2) {
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define void @f(i32 *%a, i32 %n, i64 %n2) {
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entry:
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entry:
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@ -46,7 +46,7 @@ define void @test_02(i32* %p, i32* %q) {
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; CHECK-NEXT: %inner_cond = call i1 @cond()
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; CHECK-NEXT: %inner_cond = call i1 @cond()
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; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
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; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
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; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi, %inner_loop ]
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; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi, %inner_loop ]
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; CHECK-NEXT: --> %inner_phi U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Variant }
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; CHECK-NEXT: --> %inner_lcssa U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: %outer_cond = call i1 @cond()
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; CHECK-NEXT: %outer_cond = call i1 @cond()
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; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: Determining loop execution counts for: @test_02
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; CHECK-NEXT: Determining loop execution counts for: @test_02
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@ -97,7 +97,7 @@ define void @test_03(i32* %p, i32* %q) {
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; CHECK-NEXT: %inner_cond = call i1 @cond()
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; CHECK-NEXT: %inner_cond = call i1 @cond()
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; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
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; CHECK-NEXT: --> %inner_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %inner_loop: Variant, %outer_loop: Variant }
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; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi_1, %inner_loop ]
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; CHECK-NEXT: %inner_lcssa = phi i32 [ %inner_phi_1, %inner_loop ]
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; CHECK-NEXT: --> %inner_phi_1 U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Variant }
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; CHECK-NEXT: --> %inner_lcssa U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: %outer_cond = call i1 @cond()
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; CHECK-NEXT: %outer_cond = call i1 @cond()
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; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: --> %outer_cond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %outer_loop: Variant, %inner_loop: Invariant }
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; CHECK-NEXT: Determining loop execution counts for: @test_03
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; CHECK-NEXT: Determining loop execution counts for: @test_03
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@ -53,7 +53,7 @@ define dso_local i32 @f() {
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; CHECK-NEXT: %dec.3 = add nsw i32 %storemerge1921.3, -1
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; CHECK-NEXT: %dec.3 = add nsw i32 %storemerge1921.3, -1
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; CHECK-NEXT: --> {2,+,-1}<nsw><%inner.loop> U: [2,3) S: [2,3) Exits: <<Unknown>> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
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; CHECK-NEXT: --> {2,+,-1}<nsw><%inner.loop> U: [2,3) S: [2,3) Exits: <<Unknown>> LoopDispositions: { %inner.loop: Computable, %outer.loop: Variant }
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; CHECK-NEXT: %storemerge1921.lcssa25.3 = phi i32 [ %storemerge1921.3, %for.end.3 ]
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; CHECK-NEXT: %storemerge1921.lcssa25.3 = phi i32 [ %storemerge1921.3, %for.end.3 ]
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; CHECK-NEXT: --> {3,+,-1}<nuw><nsw><%inner.loop> U: [3,4) S: [3,4) Exits: <<Unknown>> LoopDispositions: { %outer.loop: Variant, %for.cond6: Variant, %inner.loop: Computable }
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; CHECK-NEXT: --> %storemerge1921.lcssa25.3 U: [3,4) S: [3,4) Exits: <<Unknown>> LoopDispositions: { %outer.loop: Variant, %for.cond6: Invariant, %inner.loop: Invariant }
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; CHECK-NEXT: %dec16 = add nsw i32 %storemerge23, -1
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; CHECK-NEXT: %dec16 = add nsw i32 %storemerge23, -1
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; CHECK-NEXT: --> {2,+,-1}<nsw><%outer.loop> U: [0,3) S: [0,3) Exits: <<Unknown>> LoopDispositions: { %outer.loop: Computable, %for.cond6: Invariant, %inner.loop: Invariant }
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; CHECK-NEXT: --> {2,+,-1}<nsw><%outer.loop> U: [0,3) S: [0,3) Exits: <<Unknown>> LoopDispositions: { %outer.loop: Computable, %for.cond6: Invariant, %inner.loop: Invariant }
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; CHECK-NEXT: Determining loop execution counts for: @f
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; CHECK-NEXT: Determining loop execution counts for: @f
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@ -59,9 +59,9 @@ define void @f1() #0 {
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; CHECK-NEXT: %v6 = add nuw nsw i32 %v1, 1
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; CHECK-NEXT: %v6 = add nuw nsw i32 %v1, 1
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; CHECK-NEXT: --> {4,+,1}<nuw><nsw><%b1> U: [4,7) S: [4,7) Exits: 6 LoopDispositions: { %b1: Computable }
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; CHECK-NEXT: --> {4,+,1}<nuw><nsw><%b1> U: [4,7) S: [4,7) Exits: 6 LoopDispositions: { %b1: Computable }
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; CHECK-NEXT: %v7 = phi i32 [ %v1, %b1 ]
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; CHECK-NEXT: %v7 = phi i32 [ %v1, %b1 ]
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; CHECK-NEXT: --> {3,+,1}<nuw><nsw><%b1> U: [3,6) S: [3,6) --> 5 U: [5,6) S: [5,6)
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; CHECK-NEXT: --> %v7 U: [3,6) S: [3,6) --> 5 U: [5,6) S: [5,6)
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; CHECK-NEXT: %v8 = phi i16 [ %v3, %b1 ]
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; CHECK-NEXT: %v8 = phi i16 [ %v3, %b1 ]
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; CHECK-NEXT: --> {3,+,4,+,1}<%b1> U: full-set S: full-set --> 12 U: [12,13) S: [12,13)
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; CHECK-NEXT: --> %v8 U: full-set S: full-set --> 12 U: [12,13) S: [12,13)
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; CHECK-NEXT: Determining loop execution counts for: @f1
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; CHECK-NEXT: Determining loop execution counts for: @f1
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; CHECK-NEXT: Loop %b3: <multiple exits> Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %b3: <multiple exits> Unpredictable backedge-taken count.
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; CHECK-NEXT: Loop %b3: Unpredictable max backedge-taken count.
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; CHECK-NEXT: Loop %b3: Unpredictable max backedge-taken count.
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@ -12,11 +12,11 @@
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; CHECK-NEXT: %v3 = mul i16 %v2, %v2
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; CHECK-NEXT: %v3 = mul i16 %v2, %v2
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; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set Exits: 0 LoopDispositions: { %b1: Computable }
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; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set Exits: 0 LoopDispositions: { %b1: Computable }
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; CHECK-NEXT: %v5 = phi i16 [ %v2, %b1 ]
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; CHECK-NEXT: %v5 = phi i16 [ %v2, %b1 ]
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; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255)
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; CHECK-NEXT: --> %v5 U: [-256,0) S: [-256,0)
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; CHECK-NEXT: %v6 = phi i16 [ %v3, %b1 ]
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; CHECK-NEXT: %v6 = phi i16 [ %v3, %b1 ]
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; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set --> 0 U: [0,1) S: [0,1)
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; CHECK-NEXT: --> %v6 U: full-set S: full-set
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; CHECK-NEXT: %v7 = sext i16 %v5 to i32
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; CHECK-NEXT: %v7 = sext i16 %v5 to i32
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; CHECK-NEXT: --> {-1,+,-1}<nsw><%b1> U: [-256,0) S: [-256,0) --> -256 U: [-256,-255) S: [-256,-255)
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; CHECK-NEXT: --> (sext i16 %v5 to i32) U: [-256,0) S: [-256,0)
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; CHECK-NEXT: Determining loop execution counts for: @f0
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; CHECK-NEXT: Determining loop execution counts for: @f0
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; CHECK-NEXT: Loop %b1: backedge-taken count is 255
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; CHECK-NEXT: Loop %b1: backedge-taken count is 255
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; CHECK-NEXT: Loop %b1: max backedge-taken count is 255
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; CHECK-NEXT: Loop %b1: max backedge-taken count is 255
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@ -15,21 +15,23 @@ define void @f() personality i32 (...)* @_except_handler3 {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK: throw:
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; CHECK: throw:
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; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK: pad:
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; CHECK: pad:
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; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ]
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; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %unreachable] unwind label [[BLAH2:%.*]]
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; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %unreachable] unwind label [[BLAH2:%.*]]
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; CHECK: unreachable:
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; CHECK: unreachable:
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: unreachable
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; CHECK-NEXT: unreachable
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; CHECK: blah2:
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; CHECK: blah2:
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; CHECK-NEXT: [[CLEANUPPADI4_I_I_I:%.*]] = cleanuppad within none []
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; CHECK-NEXT: [[CLEANUPPADI4_I_I_I:%.*]] = cleanuppad within none []
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK: loop_body:
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; CHECK: loop_body:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLAH2]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLAH2]] ]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1
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; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1
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; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8*
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK: iter:
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; CHECK: iter:
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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@ -74,25 +76,27 @@ define void @g() personality i32 (...)* @_except_handler3 {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK: throw:
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; CHECK: throw:
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; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK: pad:
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; CHECK: pad:
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; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ]
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; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label [[UNREACHABLE:%.*]], label %blah] unwind to caller
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; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label [[UNREACHABLE:%.*]], label %blah] unwind to caller
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; CHECK: unreachable:
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; CHECK: unreachable:
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: unreachable
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; CHECK-NEXT: unreachable
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; CHECK: blah:
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; CHECK: blah:
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; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK: unwind_out:
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; CHECK: unwind_out:
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; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]]
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; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]]
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; CHECK: leave:
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; CHECK: leave:
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; CHECK-NEXT: ret void
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; CHECK-NEXT: ret void
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; CHECK: loop_body:
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; CHECK: loop_body:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLAH:%.*]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLAH:%.*]] ]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1
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; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1
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; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8*
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK: iter:
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; CHECK: iter:
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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@ -138,6 +142,7 @@ define void @h() personality i32 (...)* @_except_handler3 {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK-NEXT: br label [[THROW:%.*]]
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; CHECK: throw:
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; CHECK: throw:
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; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: invoke void @reserve()
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK-NEXT: to label [[THROW]] unwind label [[PAD:%.*]]
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; CHECK: pad:
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; CHECK: pad:
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@ -146,17 +151,18 @@ define void @h() personality i32 (...)* @_except_handler3 {
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: unreachable
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; CHECK-NEXT: unreachable
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; CHECK: blug:
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; CHECK: blug:
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; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[PAD]] ]
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; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[CATCHPAD:%.*]] = catchpad within [[CS]] []
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK: unwind_out:
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; CHECK: unwind_out:
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; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]]
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; CHECK-NEXT: catchret from [[CATCHPAD]] to label [[LEAVE:%.*]]
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; CHECK: leave:
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; CHECK: leave:
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; CHECK-NEXT: ret void
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; CHECK-NEXT: ret void
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; CHECK: loop_body:
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; CHECK: loop_body:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[BLUG:%.*]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[BLUG:%.*]] ]
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1
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; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1
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; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8*
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef
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; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
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; CHECK: iter:
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; CHECK: iter:
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
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@ -202,9 +208,11 @@ define void @i() personality i32 (...)* @_except_handler3 {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: entry:
|
||||||
; CHECK-NEXT: br label [[THROW:%.*]]
|
; CHECK-NEXT: br label [[THROW:%.*]]
|
||||||
; CHECK: throw:
|
; CHECK: throw:
|
||||||
|
; CHECK-NEXT: [[TMP96:%.*]] = getelementptr inbounds i8, i8* undef, i32 1
|
||||||
; CHECK-NEXT: invoke void @reserve()
|
; CHECK-NEXT: invoke void @reserve()
|
||||||
; CHECK-NEXT: to label [[THROW]] unwind label [[CATCHPAD:%.*]]
|
; CHECK-NEXT: to label [[THROW]] unwind label [[CATCHPAD:%.*]]
|
||||||
; CHECK: catchpad:
|
; CHECK: catchpad:
|
||||||
|
; CHECK-NEXT: [[PHI2:%.*]] = phi i8* [ [[TMP96]], [[THROW]] ]
|
||||||
; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %cp_body] unwind label [[CLEANUPPAD:%.*]]
|
; CHECK-NEXT: [[CS:%.*]] = catchswitch within none [label %cp_body] unwind label [[CLEANUPPAD:%.*]]
|
||||||
; CHECK: cp_body:
|
; CHECK: cp_body:
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
|
; CHECK-NEXT: [[TMP0:%.*]] = catchpad within [[CS]] []
|
||||||
|
@ -213,12 +221,12 @@ define void @i() personality i32 (...)* @_except_handler3 {
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = cleanuppad within none []
|
; CHECK-NEXT: [[TMP1:%.*]] = cleanuppad within none []
|
||||||
; CHECK-NEXT: br label [[LOOP_HEAD]]
|
; CHECK-NEXT: br label [[LOOP_HEAD]]
|
||||||
; CHECK: loop_head:
|
; CHECK: loop_head:
|
||||||
|
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[PHI2]], i32 -1
|
||||||
; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
|
; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
|
||||||
; CHECK: loop_body:
|
; CHECK: loop_body:
|
||||||
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[ITER:%.*]] ], [ 0, [[LOOP_HEAD]] ]
|
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP1:%.*]], [[ITER:%.*]] ], [ [[SCEVGEP]], [[LOOP_HEAD]] ]
|
||||||
; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], -1
|
; CHECK-NEXT: [[SCEVGEP1]] = getelementptr i8, i8* [[LSR_IV]], i32 1
|
||||||
; CHECK-NEXT: [[LSR_IV_NEXT1:%.*]] = inttoptr i32 [[LSR_IV_NEXT]] to i8*
|
; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[SCEVGEP1]], undef
|
||||||
; CHECK-NEXT: [[TMP100:%.*]] = icmp eq i8* [[LSR_IV_NEXT1]], null
|
|
||||||
; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
|
; CHECK-NEXT: br i1 [[TMP100]], label [[UNWIND_OUT:%.*]], label [[ITER]]
|
||||||
; CHECK: iter:
|
; CHECK: iter:
|
||||||
; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
|
; CHECK-NEXT: br i1 true, label [[UNWIND_OUT]], label [[LOOP_BODY]]
|
||||||
|
|
|
@ -6,7 +6,7 @@
|
||||||
define i8 @widget(i8* %arr, i8 %t9) {
|
define i8 @widget(i8* %arr, i8 %t9) {
|
||||||
; CHECK-LABEL: @widget(
|
; CHECK-LABEL: @widget(
|
||||||
; CHECK-NEXT: bb:
|
; CHECK-NEXT: bb:
|
||||||
; CHECK-NEXT: [[ARR1:%.*]] = ptrtoint i8* [[ARR:%.*]] to i64
|
; CHECK-NEXT: [[ARR2:%.*]] = ptrtoint i8* [[ARR:%.*]] to i64
|
||||||
; CHECK-NEXT: br label [[BB6:%.*]]
|
; CHECK-NEXT: br label [[BB6:%.*]]
|
||||||
; CHECK: bb6:
|
; CHECK: bb6:
|
||||||
; CHECK-NEXT: [[T1_0:%.*]] = phi i8* [ [[ARR]], [[BB:%.*]] ], [ null, [[BB6]] ]
|
; CHECK-NEXT: [[T1_0:%.*]] = phi i8* [ [[ARR]], [[BB:%.*]] ], [ null, [[BB6]] ]
|
||||||
|
@ -14,33 +14,32 @@ define i8 @widget(i8* %arr, i8 %t9) {
|
||||||
; CHECK-NEXT: br i1 [[C]], label [[FOR_PREHEADER:%.*]], label [[BB6]]
|
; CHECK-NEXT: br i1 [[C]], label [[FOR_PREHEADER:%.*]], label [[BB6]]
|
||||||
; CHECK: for.preheader:
|
; CHECK: for.preheader:
|
||||||
; CHECK-NEXT: [[T1_0_LCSSA:%.*]] = phi i8* [ [[T1_0]], [[BB6]] ]
|
; CHECK-NEXT: [[T1_0_LCSSA:%.*]] = phi i8* [ [[T1_0]], [[BB6]] ]
|
||||||
; CHECK-NEXT: [[T1_0_LCSSA2:%.*]] = ptrtoint i8* [[T1_0_LCSSA]] to i64
|
; CHECK-NEXT: [[T1_0_LCSSA1:%.*]] = ptrtoint i8* [[T1_0_LCSSA]] to i64
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[ARR1]] to i32
|
; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[T1_0_LCSSA1]] to i32
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]]
|
; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[ARR2]] to i32
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[T1_0_LCSSA2]] to i32
|
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[TMP1]]
|
||||||
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], [[TMP2]]
|
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP2]], 4
|
||||||
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP3]], 4
|
|
||||||
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
|
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
|
||||||
; CHECK: vector.scevcheck:
|
; CHECK: vector.scevcheck:
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = sub i64 -1, [[ARR1]]
|
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[T1_0_LCSSA1]], -1
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], [[T1_0_LCSSA2]]
|
; CHECK-NEXT: [[TMP4:%.*]] = sub i64 [[TMP3]], [[ARR2]]
|
||||||
; CHECK-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i8
|
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP4]] to i8
|
||||||
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 [[TMP6]])
|
; CHECK-NEXT: [[MUL:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 1, i8 [[TMP5]])
|
||||||
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
|
; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i8, i1 } [[MUL]], 0
|
||||||
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
|
; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i8, i1 } [[MUL]], 1
|
||||||
; CHECK-NEXT: [[TMP7:%.*]] = add i8 1, [[MUL_RESULT]]
|
; CHECK-NEXT: [[TMP6:%.*]] = add i8 1, [[MUL_RESULT]]
|
||||||
; CHECK-NEXT: [[TMP8:%.*]] = sub i8 1, [[MUL_RESULT]]
|
; CHECK-NEXT: [[TMP7:%.*]] = sub i8 1, [[MUL_RESULT]]
|
||||||
; CHECK-NEXT: [[TMP9:%.*]] = icmp sgt i8 [[TMP8]], 1
|
; CHECK-NEXT: [[TMP8:%.*]] = icmp sgt i8 [[TMP7]], 1
|
||||||
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i8 [[TMP7]], 1
|
; CHECK-NEXT: [[TMP9:%.*]] = icmp slt i8 [[TMP6]], 1
|
||||||
; CHECK-NEXT: [[TMP11:%.*]] = select i1 false, i1 [[TMP9]], i1 [[TMP10]]
|
; CHECK-NEXT: [[TMP10:%.*]] = select i1 false, i1 [[TMP8]], i1 [[TMP9]]
|
||||||
; CHECK-NEXT: [[TMP12:%.*]] = icmp ugt i64 [[TMP5]], 255
|
; CHECK-NEXT: [[TMP11:%.*]] = icmp ugt i64 [[TMP4]], 255
|
||||||
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP11]], [[TMP12]]
|
; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP10]], [[TMP11]]
|
||||||
; CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP13]], [[MUL_OVERFLOW]]
|
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP12]], [[MUL_OVERFLOW]]
|
||||||
; CHECK-NEXT: [[TMP15:%.*]] = or i1 false, [[TMP14]]
|
; CHECK-NEXT: [[TMP14:%.*]] = or i1 false, [[TMP13]]
|
||||||
; CHECK-NEXT: br i1 [[TMP15]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
|
; CHECK-NEXT: br i1 [[TMP14]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
|
||||||
; CHECK: vector.ph:
|
; CHECK: vector.ph:
|
||||||
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP3]], 4
|
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP2]], 4
|
||||||
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP3]], [[N_MOD_VF]]
|
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP2]], [[N_MOD_VF]]
|
||||||
; CHECK-NEXT: [[IND_END:%.*]] = trunc i32 [[N_VEC]] to i8
|
; CHECK-NEXT: [[IND_END:%.*]] = trunc i32 [[N_VEC]] to i8
|
||||||
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[T9:%.*]], i32 0
|
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[T9:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer
|
||||||
|
@ -48,20 +47,20 @@ define i8 @widget(i8* %arr, i8 %t9) {
|
||||||
; CHECK: vector.body:
|
; CHECK: vector.body:
|
||||||
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
|
||||||
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
|
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <4 x i8> [ <i8 0, i8 1, i8 2, i8 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
|
||||||
; CHECK-NEXT: [[TMP16:%.*]] = add <4 x i8> [[VEC_IND]], <i8 1, i8 1, i8 1, i8 1>
|
; CHECK-NEXT: [[TMP15:%.*]] = add <4 x i8> [[VEC_IND]], <i8 1, i8 1, i8 1, i8 1>
|
||||||
; CHECK-NEXT: [[TMP17:%.*]] = extractelement <4 x i8> [[TMP16]], i32 0
|
; CHECK-NEXT: [[TMP16:%.*]] = extractelement <4 x i8> [[TMP15]], i32 0
|
||||||
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, i8* [[ARR]], i8 [[TMP17]]
|
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, i8* [[ARR]], i8 [[TMP16]]
|
||||||
; CHECK-NEXT: [[TMP19:%.*]] = icmp slt <4 x i8> [[TMP16]], [[BROADCAST_SPLAT]]
|
; CHECK-NEXT: [[TMP18:%.*]] = icmp slt <4 x i8> [[TMP15]], [[BROADCAST_SPLAT]]
|
||||||
; CHECK-NEXT: [[TMP20:%.*]] = zext <4 x i1> [[TMP19]] to <4 x i8>
|
; CHECK-NEXT: [[TMP19:%.*]] = zext <4 x i1> [[TMP18]] to <4 x i8>
|
||||||
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i32 0
|
; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i32 0
|
||||||
; CHECK-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to <4 x i8>*
|
; CHECK-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to <4 x i8>*
|
||||||
; CHECK-NEXT: store <4 x i8> [[TMP20]], <4 x i8>* [[TMP22]], align 1
|
; CHECK-NEXT: store <4 x i8> [[TMP19]], <4 x i8>* [[TMP21]], align 1
|
||||||
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
|
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
|
||||||
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], <i8 4, i8 4, i8 4, i8 4>
|
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <4 x i8> [[VEC_IND]], <i8 4, i8 4, i8 4, i8 4>
|
||||||
; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
|
; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
|
||||||
; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
; CHECK-NEXT: br i1 [[TMP22]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; CHECK: middle.block:
|
; CHECK: middle.block:
|
||||||
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP3]], [[N_VEC]]
|
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP2]], [[N_VEC]]
|
||||||
; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]]
|
; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_EXIT:%.*]], label [[SCALAR_PH]]
|
||||||
; CHECK: scalar.ph:
|
; CHECK: scalar.ph:
|
||||||
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_PREHEADER]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
|
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i8 [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ 0, [[FOR_PREHEADER]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
|
||||||
|
|
Loading…
Reference in New Issue