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[RISCV] Parse RISC-V eflags in ObjectYAML 

Differential Revision: https://reviews.llvm.org/D38311
Patch by Chih-Mao Chen.

llvm-svn: 314770
This commit is contained in:
Alex Bradbury 2017-10-03 08:00:47 +00:00
parent 224661d94b
commit 1fb1a480b5
1 changed files with 8 additions and 0 deletions
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8
llvm/lib/ObjectYAML/ELFYAML.cpp
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@ -359,6 +359,14 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCase(EF_AVR_ARCH_XMEGA6);
BCase(EF_AVR_ARCH_XMEGA7);
break;
case ELF::EM_RISCV:
BCase(EF_RISCV_RVC);
BCaseMask(EF_RISCV_FLOAT_ABI_SOFT, EF_RISCV_FLOAT_ABI);
BCaseMask(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI);
BCaseMask(EF_RISCV_FLOAT_ABI_DOUBLE, EF_RISCV_FLOAT_ABI);
BCaseMask(EF_RISCV_FLOAT_ABI_QUAD, EF_RISCV_FLOAT_ABI);
BCase(EF_RISCV_RVE);
break;
case ELF::EM_AMDGPU:
case ELF::EM_X86_64:
break;