forked from OSchip/llvm-project
[SelectionDAG] Add check for BUILD_VECTOR in isKnownNeverNaN
Includes handling of constants with vector type in isKnownNeverNaN. For AMDGPU results in not making fcanonicalize during legalization for vector inputs to fmaxnum_ieee and fminnum_ieee. Does not affect end result since there is a combine that eliminates fcanonicalize. Differential Revision: https://reviews.llvm.org/D88573
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@ -2027,9 +2027,9 @@ public:
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/// X|Cst == X+Cst iff X&Cst = 0.
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bool isBaseWithConstantOffset(SDValue Op) const;
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/// Test whether the given SDValue is known to never be NaN. If \p SNaN is
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/// true, returns if \p Op is known to never be a signaling NaN (it may still
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/// be a qNaN).
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/// Test whether the given SDValue (or all elements of it, if it is a
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/// vector) is known to never be NaN. If \p SNaN is true, returns if \p Op is
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/// known to never be a signaling NaN (it may still be a qNaN).
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bool isKnownNeverNaN(SDValue Op, bool SNaN = false, unsigned Depth = 0) const;
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/// \returns true if \p Op is known to never be a signaling NaN.
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@ -4683,7 +4683,6 @@ bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const
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if (Depth >= MaxRecursionDepth)
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return false; // Limit search depth.
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// TODO: Handle vectors.
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// If the value is a constant, we can obviously see if it is a NaN or not.
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if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) {
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return !C->getValueAPF().isNaN() ||
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@ -4781,6 +4780,12 @@ bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const
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case ISD::EXTRACT_VECTOR_ELT: {
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return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
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}
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case ISD::BUILD_VECTOR: {
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for (const SDValue &Opnd : Op->ops())
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if (!isKnownNeverNaN(Opnd, SNaN, Depth + 1))
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return false;
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return true;
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}
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default:
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if (Opcode >= ISD::BUILTIN_OP_END ||
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Opcode == ISD::INTRINSIC_WO_CHAIN ||
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