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Refactor code to add load / store folded instructions -> register only 

instructions reverse map.

llvm-svn: 42509
This commit is contained in:
Evan Cheng 2007-10-01 23:44:33 +00:00
parent b6c05b1f90
commit 1f79ba6fe6
2 changed files with 599 additions and 607 deletions
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1188
llvm/lib/Target/X86/X86RegisterInfo.cpp
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File diff suppressed because it is too large Load Diff

18
llvm/lib/Target/X86/X86RegisterInfo.h
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@ -14,6 +14,7 @@
#ifndef X86REGISTERINFO_H #ifndef X86REGISTERINFO_H
#define X86REGISTERINFO_H #define X86REGISTERINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/SmallVector.h"
#include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/MRegisterInfo.h"
#include "X86GenRegisterInfo.h.inc" #include "X86GenRegisterInfo.h.inc"
@ -38,17 +39,33 @@ public:
private: private:
/// Is64Bit - Is the target 64-bits. /// Is64Bit - Is the target 64-bits.
///
bool Is64Bit; bool Is64Bit;
/// SlotSize - Stack slot size in bytes. /// SlotSize - Stack slot size in bytes.
///
unsigned SlotSize; unsigned SlotSize;
/// StackPtr - X86 physical register used as stack ptr. /// StackPtr - X86 physical register used as stack ptr.
///
unsigned StackPtr; unsigned StackPtr;
/// FramePtr - X86 physical register used as frame ptr. /// FramePtr - X86 physical register used as frame ptr.
///
unsigned FramePtr; unsigned FramePtr;
/// RegOp2MemOpTable2Addr, RegOp2MemOpTable0, RegOp2MemOpTable1,
/// RegOp2MemOpTable2 - Load / store folding opcode maps.
///
DenseMap<unsigned*, unsigned> RegOp2MemOpTable2Addr;
DenseMap<unsigned*, unsigned> RegOp2MemOpTable0;
DenseMap<unsigned*, unsigned> RegOp2MemOpTable1;
DenseMap<unsigned*, unsigned> RegOp2MemOpTable2;
/// MemOp2RegOpTable - Load / store unfolding opcode map.
///
DenseMap<unsigned*, unsigned> MemOp2RegOpTable;
public: public:
X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii); X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);
@ -57,6 +74,7 @@ public:
unsigned getX86RegNum(unsigned RegNo); unsigned getX86RegNum(unsigned RegNo);
/// Code Generation virtual methods... /// Code Generation virtual methods...
///
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const; const std::vector<CalleeSavedInfo> &CSI) const;