From 1ecffe13b2b1f14d5f37119ea1370da4223f39dc Mon Sep 17 00:00:00 2001
From: Sanjiv Gupta <sanjiv.gupta@microchip.com>
Date: Mon, 28 Dec 2009 04:53:24 +0000
Subject: [PATCH] Fixed llc crash for zext (i1 -> i8) loads.

llvm-svn: 92201
---
 llvm/lib/Target/PIC16/PIC16ISelLowering.cpp |  4 +--
 llvm/test/CodeGen/PIC16/C16-11.ll           | 37 +++++++++++++++++++++
 2 files changed, 39 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/PIC16/C16-11.ll

diff --git a/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp b/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
index 2aa451c1d1fe..3ab3f716f77b 100644
--- a/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/llvm/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -930,7 +930,7 @@ SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
   }
   else if (VT == MVT::i16) {
     BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, PICLoads[0], PICLoads[1]);
-    if (MemVT == MVT::i8)
+    if ((MemVT == MVT::i8) || (MemVT == MVT::i1))
       Chain = getChain(PICLoads[0]);
     else
       Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 
@@ -942,7 +942,7 @@ SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
     BPs[1] = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16,
                          PICLoads[2], PICLoads[3]);
     BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, BPs[0], BPs[1]);
-    if (MemVT == MVT::i8)
+    if ((MemVT == MVT::i8) || (MemVT == MVT::i1))
       Chain = getChain(PICLoads[0]);
     else if (MemVT == MVT::i16)
       Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 
diff --git a/llvm/test/CodeGen/PIC16/C16-11.ll b/llvm/test/CodeGen/PIC16/C16-11.ll
new file mode 100644
index 000000000000..e70092b11c9a
--- /dev/null
+++ b/llvm/test/CodeGen/PIC16/C16-11.ll
@@ -0,0 +1,37 @@
+;RUN: llc < %s -march=pic16
+
+@c612.auto.a.b = internal global i1 false         ; <i1*> [#uses=2]
+@c612.auto.A.b = internal global i1 false         ; <i1*> [#uses=2]
+
+define void @c612() nounwind {
+entry:
+  %tmp3.b = load i1* @c612.auto.a.b               ; <i1> [#uses=1]
+  %tmp3 = zext i1 %tmp3.b to i16                  ; <i16> [#uses=1]
+  %tmp4.b = load i1* @c612.auto.A.b               ; <i1> [#uses=1]
+  %tmp4 = select i1 %tmp4.b, i16 2, i16 0         ; <i16> [#uses=1]
+  %cmp5 = icmp ne i16 %tmp3, %tmp4                ; <i1> [#uses=1]
+  %conv7 = zext i1 %cmp5 to i8                    ; <i8> [#uses=1]
+  tail call void @expectWrap(i8 %conv7, i8 2)
+  ret void
+}
+
+define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind {
+entry:
+  %tobool = icmp eq i8 %boolresult, 0             ; <i1> [#uses=1]
+  br i1 %tobool, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  tail call void @exit(i16 1)
+  unreachable
+
+if.end:                                           ; preds = %entry
+  ret void
+}
+
+define i16 @main() nounwind {
+entry:
+  tail call void @c612()
+  ret i16 0
+}
+
+declare void @exit(i16) noreturn nounwind