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Refactor ARM subarchitecture parsing 

According to a FIXME in ARMMCTargetDesc.cpp the ARM version parsing should be
in the Triple helper class.

Patch by: Gabor Ballabas

llvm-svn: 212479
This commit is contained in:
Renato Golin 2014-07-07 20:01:11 +00:00
parent 5fd91e0c0b
commit 1e9c282cd1
3 changed files with 123 additions and 82 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
llvm/include/llvm/ADT/Triple.h
View File

@ -78,6 +78,22 @@ public:
spir, // SPIR: standard portable IR for OpenCL 32-bit version spir, // SPIR: standard portable IR for OpenCL 32-bit version
spir64 // SPIR: standard portable IR for OpenCL 64-bit version spir64 // SPIR: standard portable IR for OpenCL 64-bit version
}; };
enum SubArchType {
NoSubArch,
ARMSubArch_v8,
ARMSubArch_v7,
ARMSubArch_v7em,
ARMSubArch_v7m,
ARMSubArch_v7s,
ARMSubArch_v6,
ARMSubArch_v6m,
ARMSubArch_v6t2,
ARMSubArch_v5,
ARMSubArch_v5te,
ARMSubArch_v4t,
ARMSubArch_v4
};
enum VendorType { enum VendorType {
UnknownVendor, UnknownVendor,
@ -148,6 +164,9 @@ private:
/// The parsed arch type. /// The parsed arch type.
ArchType Arch; ArchType Arch;
/// The parsed subarchitecture type.
SubArchType SubArch;
/// The parsed vendor type. /// The parsed vendor type.
VendorType Vendor; VendorType Vendor;
@ -190,6 +209,9 @@ public:
/// getArch - Get the parsed architecture type of this triple. /// getArch - Get the parsed architecture type of this triple.
ArchType getArch() const { return Arch; } ArchType getArch() const { return Arch; }
/// getSubArch - get the parsed subarchitecture type for this triple.
SubArchType getSubArch() const { return SubArch; }
/// getVendor - Get the parsed vendor type of this triple. /// getVendor - Get the parsed vendor type of this triple.
VendorType getVendor() const { return Vendor; } VendorType getVendor() const { return Vendor; }

23
llvm/lib/Support/Triple.cpp
View File

@ -350,6 +350,26 @@ static Triple::ObjectFormatType parseFormat(StringRef EnvironmentName) {
.Default(Triple::UnknownObjectFormat); .Default(Triple::UnknownObjectFormat);
} }
static Triple::SubArchType parseSubArch(StringRef SubArchName) {
return StringSwitch<Triple::SubArchType>(SubArchName)
.EndsWith("v8", Triple::ARMSubArch_v8)
.EndsWith("v8a", Triple::ARMSubArch_v8)
.EndsWith("v7", Triple::ARMSubArch_v7)
.EndsWith("v7a", Triple::ARMSubArch_v7)
.EndsWith("v7em", Triple::ARMSubArch_v7em)
.EndsWith("v7m", Triple::ARMSubArch_v7m)
.EndsWith("v7s", Triple::ARMSubArch_v7s)
.EndsWith("v6", Triple::ARMSubArch_v6)
.EndsWith("v6m", Triple::ARMSubArch_v6m)
.EndsWith("v6t2", Triple::ARMSubArch_v6t2)
.EndsWith("v5", Triple::ARMSubArch_v5)
.EndsWith("v5t", Triple::ARMSubArch_v5)
.EndsWith("v5te", Triple::ARMSubArch_v5te)
.EndsWith("v4t", Triple::ARMSubArch_v4t)
.EndsWith("v4", Triple::ARMSubArch_v4)
.Default(Triple::NoSubArch);
}
static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) { static const char *getObjectFormatTypeName(Triple::ObjectFormatType Kind) {
switch (Kind) { switch (Kind) {
case Triple::UnknownObjectFormat: return ""; case Triple::UnknownObjectFormat: return "";
@ -375,6 +395,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
Triple::Triple(const Twine &Str) Triple::Triple(const Twine &Str)
: Data(Str.str()), : Data(Str.str()),
Arch(parseArch(getArchName())), Arch(parseArch(getArchName())),
SubArch(parseSubArch(getArchName())),
Vendor(parseVendor(getVendorName())), Vendor(parseVendor(getVendorName())),
OS(parseOS(getOSName())), OS(parseOS(getOSName())),
Environment(parseEnvironment(getEnvironmentName())), Environment(parseEnvironment(getEnvironmentName())),
@ -392,6 +413,7 @@ Triple::Triple(const Twine &Str)
Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr) Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr)
: Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()), : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr).str()),
Arch(parseArch(ArchStr.str())), Arch(parseArch(ArchStr.str())),
SubArch(parseSubArch(ArchStr.str())),
Vendor(parseVendor(VendorStr.str())), Vendor(parseVendor(VendorStr.str())),
OS(parseOS(OSStr.str())), OS(parseOS(OSStr.str())),
Environment(), ObjectFormat(Triple::UnknownObjectFormat) { Environment(), ObjectFormat(Triple::UnknownObjectFormat) {
@ -408,6 +430,7 @@ Triple::Triple(const Twine &ArchStr, const Twine &VendorStr, const Twine &OSStr,
: Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') + : Data((ArchStr + Twine('-') + VendorStr + Twine('-') + OSStr + Twine('-') +
EnvironmentStr).str()), EnvironmentStr).str()),
Arch(parseArch(ArchStr.str())), Arch(parseArch(ArchStr.str())),
SubArch(parseSubArch(ArchStr.str())),
Vendor(parseVendor(VendorStr.str())), Vendor(parseVendor(VendorStr.str())),
OS(parseOS(OSStr.str())), OS(parseOS(OSStr.str())),
Environment(parseEnvironment(EnvironmentStr.str())), Environment(parseEnvironment(EnvironmentStr.str())),

160
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
View File

@ -84,93 +84,89 @@ static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) { std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {
Triple triple(TT); Triple triple(TT);
// Set the boolean corresponding to the current target triple, or the default
// if one cannot be determined, to true.
unsigned Len = TT.size();
unsigned Idx = 0;
// FIXME: Enhance Triple helper class to extract ARM version.
bool isThumb = triple.getArch() == Triple::thumb || bool isThumb = triple.getArch() == Triple::thumb ||
triple.getArch() == Triple::thumbeb; triple.getArch() == Triple::thumbeb;
if (Len >= 5 && TT.substr(0, 4) == "armv")
Idx = 4;
else if (Len >= 7 && TT.substr(0, 6) == "armebv")
Idx = 6;
else if (Len >= 7 && TT.substr(0, 6) == "thumbv")
Idx = 6;
else if (Len >= 9 && TT.substr(0, 8) == "thumbebv")
Idx = 8;
bool NoCPU = CPU == "generic" || CPU.empty(); bool NoCPU = CPU == "generic" || CPU.empty();
std::string ARMArchFeature; std::string ARMArchFeature;
if (Idx) { switch (triple.getSubArch()) {
unsigned SubVer = TT[Idx]; case Triple::ARMSubArch_v8:
if (SubVer == '8') { if (NoCPU)
if (NoCPU) // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
// v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2, // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
// FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone, // FeatureT2XtPk, FeatureCrypto, FeatureCRC
// FeatureT2XtPk, FeatureCrypto, FeatureCRC ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm," "+trustzone,+t2xtpk,+crypto,+crc";
"+trustzone,+t2xtpk,+crypto,+crc"; else
else // Use CPU to figure out the exact features
// Use CPU to figure out the exact features ARMArchFeature = "+v8";
ARMArchFeature = "+v8"; break;
} else if (SubVer == '7') { case Triple::ARMSubArch_v7m:
if (Len >= Idx+2 && TT[Idx+1] == 'm') { isThumb = true;
isThumb = true; if (NoCPU)
if (NoCPU) // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
// v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass"; else
else // Use CPU to figure out the exact features.
// Use CPU to figure out the exact features. ARMArchFeature = "+v7";
ARMArchFeature = "+v7"; break;
} else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') { case Triple::ARMSubArch_v7em:
if (NoCPU) if (NoCPU)
// v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2, // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
// FeatureT2XtPk, FeatureMClass // FeatureT2XtPk, FeatureMClass
ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass"; ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
else else
// Use CPU to figure out the exact features. // Use CPU to figure out the exact features.
ARMArchFeature = "+v7"; ARMArchFeature = "+v7";
} else if (Len >= Idx+2 && TT[Idx+1] == 's') { break;
if (NoCPU) case Triple::ARMSubArch_v7s:
// v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS if (NoCPU)
// Swift // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras"; // Swift
else ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
// Use CPU to figure out the exact features. else
ARMArchFeature = "+v7"; // Use CPU to figure out the exact features.
} else { ARMArchFeature = "+v7";
// v7 CPUs have lots of different feature sets. If no CPU is specified, break;
// then assume v7a (e.g. cortex-a8) feature set. Otherwise, return case Triple::ARMSubArch_v7:
// the "minimum" feature set and use CPU string to figure out the exact // v7 CPUs have lots of different feature sets. If no CPU is specified,
// features. // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
if (NoCPU) // the "minimum" feature set and use CPU string to figure out the exact
// v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk // features.
ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk"; if (NoCPU)
else // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
// Use CPU to figure out the exact features. ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
ARMArchFeature = "+v7"; else
} // Use CPU to figure out the exact features.
} else if (SubVer == '6') { ARMArchFeature = "+v7";
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') break;
ARMArchFeature = "+v6t2"; case Triple::ARMSubArch_v6t2:
else if (Len >= Idx+2 && TT[Idx+1] == 'm') { ARMArchFeature = "+v6t2";
isThumb = true; break;
if (NoCPU) case Triple::ARMSubArch_v6m:
// v6m: FeatureNoARM, FeatureMClass isThumb = true;
ARMArchFeature = "+v6m,+noarm,+mclass"; if (NoCPU)
else // v6m: FeatureNoARM, FeatureMClass
ARMArchFeature = "+v6"; ARMArchFeature = "+v6m,+noarm,+mclass";
} else else
ARMArchFeature = "+v6"; ARMArchFeature = "+v6";
} else if (SubVer == '5') { break;
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') case Triple::ARMSubArch_v6:
ARMArchFeature = "+v5te"; ARMArchFeature = "+v6";
else break;
ARMArchFeature = "+v5t"; case Triple::ARMSubArch_v5te:
} else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't') ARMArchFeature = "+v5te";
ARMArchFeature = "+v4t"; break;
case Triple::ARMSubArch_v5:
ARMArchFeature = "+v5t";
break;
case Triple::ARMSubArch_v4t:
ARMArchFeature = "+v4t";
break;
case Triple::NoSubArch:
case Triple::ARMSubArch_v4:
ARMArchFeature = "+v4";
break;
} }
if (isThumb) { if (isThumb) {