forked from OSchip/llvm-project
[Hexagon] Add HexagonMCInstrInfo::IsABranchingInst, NFC
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c5327137df
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1e7bd93ff2
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@ -317,8 +317,7 @@ bool HexagonMCChecker::checkAXOK() {
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void HexagonMCChecker::reportBranchErrors() {
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void HexagonMCChecker::reportBranchErrors() {
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I);
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if (HexagonMCInstrInfo::IsABranchingInst(MCII, STI, I))
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if (Desc.isBranch() || Desc.isCall() || Desc.isReturn())
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reportNote(I.getLoc(), "Branching instruction");
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reportNote(I.getLoc(), "Branching instruction");
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}
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}
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}
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}
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@ -328,8 +327,7 @@ bool HexagonMCChecker::checkHWLoop() {
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!HexagonMCInstrInfo::isOuterLoop(MCB))
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!HexagonMCInstrInfo::isOuterLoop(MCB))
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return true;
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return true;
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I);
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if (HexagonMCInstrInfo::IsABranchingInst(MCII, STI, I)) {
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if (Desc.isBranch() || Desc.isCall() || Desc.isReturn()) {
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reportError(MCB.getLoc(),
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reportError(MCB.getLoc(),
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"Branches cannot be in a packet with hardware loops");
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"Branches cannot be in a packet with hardware loops");
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reportBranchErrors();
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reportBranchErrors();
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@ -342,8 +340,7 @@ bool HexagonMCChecker::checkHWLoop() {
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bool HexagonMCChecker::checkCOFMax1() {
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bool HexagonMCChecker::checkCOFMax1() {
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SmallVector<MCInst const *, 2> BranchLocations;
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SmallVector<MCInst const *, 2> BranchLocations;
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCB)) {
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MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I);
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if (HexagonMCInstrInfo::IsABranchingInst(MCII, STI, I))
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if (Desc.isBranch() || Desc.isCall() || Desc.isReturn())
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BranchLocations.push_back(&I);
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BranchLocations.push_back(&I);
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}
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}
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for (unsigned J = 0, N = BranchLocations.size(); J < N; ++J) {
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for (unsigned J = 0, N = BranchLocations.size(); J < N; ++J) {
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@ -1030,3 +1030,11 @@ unsigned HexagonMCInstrInfo::SubregisterBit(unsigned Consumer,
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return Consumer == Producer;
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return Consumer == Producer;
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return 0;
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return 0;
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}
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}
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bool HexagonMCInstrInfo::IsABranchingInst(MCInstrInfo const &MCII,
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MCSubtargetInfo const &STI,
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MCInst const &I) {
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assert(!HexagonMCInstrInfo::isBundle(I));
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MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, I);
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return (Desc.isBranch() || Desc.isCall() || Desc.isReturn());
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}
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@ -95,6 +95,8 @@ bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
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MCContext &Context, MCInst &MCB,
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MCContext &Context, MCInst &MCB,
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HexagonMCChecker *Checker,
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HexagonMCChecker *Checker,
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bool AttemptCompatibility = false);
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bool AttemptCompatibility = false);
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bool IsABranchingInst(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
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MCInst const &I);
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// Create a duplex instruction given the two subinsts
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// Create a duplex instruction given the two subinsts
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MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
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MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
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