forked from OSchip/llvm-project
[asan] Hook ClInstrumentWrites and ClInstrumentReads to masked operation instrumentation.
Reviewers: kcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D27548 llvm-svn: 289717
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@ -1046,10 +1046,14 @@ Value *AddressSanitizer::isInterestingMemoryAccess(Instruction *I,
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F->getName().startswith("llvm.masked.store."))) {
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unsigned OpOffset = 0;
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if (F->getName().startswith("llvm.masked.store.")) {
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if (!ClInstrumentWrites)
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return nullptr;
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// Masked store has an initial operand for the value.
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OpOffset = 1;
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*IsWrite = true;
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} else {
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if (!ClInstrumentReads)
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return nullptr;
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*IsWrite = false;
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}
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// Only instrument if the mask is constant for now.
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@ -1,4 +1,11 @@
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; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=BOTH
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; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -S \
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; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=STORE -check-prefix=ALL
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; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -S \
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; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=STORE -check-prefix=ALL
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; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-writes=0 -S \
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; RUN: | FileCheck %s -check-prefix=LOAD -check-prefix=NOSTORE -check-prefix=ALL
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; RUN: opt < %s -asan -asan-instrumentation-with-call-threshold=0 -asan-instrument-reads=0 -asan-instrument-writes=0 -S \
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; RUN: | FileCheck %s -check-prefix=NOLOAD -check-prefix=NOSTORE -check-prefix=ALL
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; Support ASan instrumentation for constant-mask llvm.masked.{load,store}
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@ -13,8 +20,9 @@ declare void @llvm.masked.store.v8i32.p0v8i32(<8 x i32>, <8 x i32>*, i32, <8 x i
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declare void @llvm.masked.store.v4p0i32.p0v4p0i32(<4 x i32*>, <4 x i32*>*, i32, <4 x i1>) argmemonly nounwind
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define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
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; BOTH-LABEL: @store.v4f32.1110
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; ALL-LABEL: @store.v4f32.1110
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%p = load <4 x float>*, <4 x float>** @v4f32, align 8
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; NOSTORE-NOT: call void @__asan_store
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; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
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; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
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; STORE: call void @__asan_store4(i64 [[PGEP0]])
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@ -30,8 +38,9 @@ define void @store.v4f32.1110(<4 x float> %arg) sanitize_address {
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}
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define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
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; BOTH-LABEL: @store.v8i32.10010110
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; ALL-LABEL: @store.v8i32.10010110
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%p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
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; NOSTORE-NOT: call void @__asan_store
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; STORE: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
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; STORE: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
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; STORE: call void @__asan_store4(i64 [[PGEP0]])
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@ -50,8 +59,9 @@ define void @store.v8i32.10010110(<8 x i32> %arg) sanitize_address {
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}
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define void @store.v4i64.0001(<4 x i32*> %arg) sanitize_address {
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; BOTH-LABEL: @store.v4i64.0001
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; ALL-LABEL: @store.v4i64.0001
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%p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
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; NOSTORE-NOT: call void @__asan_store
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; STORE: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
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; STORE: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
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; STORE: call void @__asan_store8(i64 [[PGEP3]])
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@ -61,9 +71,9 @@ define void @store.v4i64.0001(<4 x i32*> %arg) sanitize_address {
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}
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define void @store.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
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; BOTH-LABEL: @store.v4f32.variable
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; ALL-LABEL: @store.v4f32.variable
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%p = load <4 x float>*, <4 x float>** @v4f32, align 8
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; BOTH-NOT: call void @__asan_store
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; ALL-NOT: call void @__asan_store
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tail call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %arg, <4 x float>* %p, i32 4, <4 x i1> %mask)
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ret void
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}
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@ -74,8 +84,9 @@ declare <8 x i32> @llvm.masked.load.v8i32.p0v8i32(<8 x i32>*, i32, <8 x i1>, <8
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declare <4 x i32*> @llvm.masked.load.v4p0i32.p0v4p0i32(<4 x i32*>*, i32, <4 x i1>, <4 x i32*>) argmemonly nounwind
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define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
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; BOTH-LABEL: @load.v8i32.11100001
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; ALL-LABEL: @load.v8i32.11100001
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%p = load <8 x i32>*, <8 x i32>** @v8i32, align 8
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; NOLOAD-NOT: call void @__asan_load
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; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <8 x i32>, <8 x i32>* %p, i64 0, i64 0
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; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint i32* [[GEP0]] to i64
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; LOAD: call void @__asan_load4(i64 [[PGEP0]])
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@ -94,8 +105,9 @@ define <8 x i32> @load.v8i32.11100001(<8 x i32> %arg) sanitize_address {
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}
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define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
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; BOTH-LABEL: @load.v4f32.1001
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; ALL-LABEL: @load.v4f32.1001
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%p = load <4 x float>*, <4 x float>** @v4f32, align 8
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; NOLOAD-NOT: call void @__asan_load
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; LOAD: [[GEP0:%[0-9A-Za-z]+]] = getelementptr <4 x float>, <4 x float>* %p, i64 0, i64 0
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; LOAD: [[PGEP0:%[0-9A-Za-z]+]] = ptrtoint float* [[GEP0]] to i64
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; LOAD: call void @__asan_load4(i64 [[PGEP0]])
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@ -108,8 +120,9 @@ define <4 x float> @load.v4f32.1001(<4 x float> %arg) sanitize_address {
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}
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define <4 x i32*> @load.v4i64.0001(<4 x i32*> %arg) sanitize_address {
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; BOTH-LABEL: @load.v4i64.0001
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; ALL-LABEL: @load.v4i64.0001
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%p = load <4 x i32*>*, <4 x i32*>** @v4i64, align 8
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; NOLOAD-NOT: call void @__asan_load
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; LOAD: [[GEP3:%[0-9A-Za-z]+]] = getelementptr <4 x i32*>, <4 x i32*>* %p, i64 0, i64 3
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; LOAD: [[PGEP3:%[0-9A-Za-z]+]] = ptrtoint i32** [[GEP3]] to i64
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; LOAD: call void @__asan_load8(i64 [[PGEP3]])
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@ -119,9 +132,9 @@ define <4 x i32*> @load.v4i64.0001(<4 x i32*> %arg) sanitize_address {
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}
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define <4 x float> @load.v4f32.variable(<4 x float> %arg, <4 x i1> %mask) sanitize_address {
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; BOTH-LABEL: @load.v4f32.variable
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; ALL-LABEL: @load.v4f32.variable
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%p = load <4 x float>*, <4 x float>** @v4f32, align 8
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; BOTH-NOT: call void @__asan_load
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; ALL-NOT: call void @__asan_load
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%res = tail call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %p, i32 4, <4 x i1> %mask, <4 x float> %arg)
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ret <4 x float> %res
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}
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