forked from OSchip/llvm-project
[Hexagon] Fix decoding conflict between A2_zxtb and A4_ext
llvm-svn: 294472
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@ -436,6 +436,8 @@ def : InstAlias<"$Pd=cmp.ltu($Rs, $Rt)",
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// Rd=neg(Rs) is aliased to Rd=sub(#0,Rs)
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def : InstAlias<"$Rd = neg($Rs)",
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(A2_subri IntRegs:$Rd, 0, IntRegs:$Rs), 0>;
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def : InstAlias<"$Rd=zxtb($Rs)",
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(A2_andir IntRegs:$Rd, IntRegs:$Rs, 255)>;
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def : InstAlias<"m0 = $Rs", (A2_tfrrcr C6, IntRegs:$Rs)>;
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def : InstAlias<"$Rd = m0", (A2_tfrcrr IntRegs:$Rd, C6)>;
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@ -706,7 +706,7 @@ defm zxth : ALU32_2op_base<"zxth", 0b110>, PredNewRel;
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// handle 'mapped' instructions, we need to encode 'zxtb' same as 'and' where
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// immediate operand is set to '255'.
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let hasNewValue = 1, opNewValue = 0 in
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let hasNewValue = 1, opNewValue = 0, isPseudo = 1, isCodeGenOnly = 1 in
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class T_ZXTB: ALU32Inst < (outs IntRegs:$Rd), (ins IntRegs:$Rs),
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"$Rd=zxtb($Rs)", [] >;
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