Make a CodeGen test more robust against vector register selection

llvm-svn: 208351
This commit is contained in:
Justin Bogner 2014-05-08 18:53:56 +00:00
parent bce1e4d60e
commit 1de42075fc
1 changed files with 19 additions and 20 deletions

View File

@ -22,11 +22,11 @@ define void @arg_double( double %val ) {
define void @arg_v4i32(<4 x i32> %vec ) { define void @arg_v4i32(<4 x i32> %vec ) {
; CHECK-LABEL: arg_v4i32: ; CHECK-LABEL: arg_v4i32:
; CHECK-LE: vmov d17, r2, r3 ; CHECK-LE: vmov {{d[0-9]+}}, r2, r3
; CHECK-LE: vmov d16, r0, r1 ; CHECK-LE: vmov {{d[0-9]+}}, r0, r1
; CHECK-BE: vmov d17, r3, r2 ; CHECK-BE: vmov {{d[0-9]+}}, r3, r2
; CHECK-BE: vmov d16, r1, r0 ; CHECK-BE: vmov {{d[0-9]+}}, r1, r0
; CHECK: vst1.32 {d16[0]}, [r0:32] ; CHECK: vst1.32 {{{d[0-9]+}}[0]}, [r0:32]
%tmp = extractelement <4 x i32> %vec, i32 0 %tmp = extractelement <4 x i32> %vec, i32 0
store i32 %tmp, i32* @var32 store i32 %tmp, i32* @var32
ret void ret void
@ -51,26 +51,26 @@ define i64 @return_longint() {
define double @return_double() { define double @return_double() {
; CHECK-LABEL: return_double: ; CHECK-LABEL: return_double:
; CHECK-LE: vmov r0, r1, d16 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
; CHECK-BE: vmov r1, r0, d16 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
ret double 1.0 ret double 1.0
} }
define <4 x i32> @return_v4i32() { define <4 x i32> @return_v4i32() {
; CHECK-LABEL: return_v4i32: ; CHECK-LABEL: return_v4i32:
; CHECK-LE: vmov r0, r1, d16 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
; CHECK-LE: vmov r2, r3, d17 ; CHECK-LE: vmov r2, r3, {{d[0-9]+}}
; CHECK-BE: vmov r1, r0, d16 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
; CHECK-BE: vmov r3, r2, d17 ; CHECK-BE: vmov r3, r2, {{d[0-9]+}}
ret < 4 x i32> < i32 42, i32 43, i32 44, i32 45 > ret < 4 x i32> < i32 42, i32 43, i32 44, i32 45 >
} }
define <2 x double> @return_v2f64() { define <2 x double> @return_v2f64() {
; CHECK-LABEL: return_v2f64: ; CHECK-LABEL: return_v2f64:
; CHECK-LE: vmov r0, r1, d16 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
; CHECK-LE: vmov r2, r3, d17 ; CHECK-LE: vmov r2, r3, {{d[0-9]+}}
; CHECK-BE: vmov r1, r0, d16 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
; CHECK-BE: vmov r3, r2, d17 ; CHECK-BE: vmov r3, r2, {{d[0-9]+}}
ret <2 x double> < double 3.14, double 6.28 > ret <2 x double> < double 3.14, double 6.28 >
} }
@ -86,8 +86,8 @@ define void @caller_arg_longint() {
define void @caller_arg_double() { define void @caller_arg_double() {
; CHECK-LABEL: caller_arg_double: ; CHECK-LABEL: caller_arg_double:
; CHECK-LE: vmov r0, r1, d16 ; CHECK-LE: vmov r0, r1, {{d[0-9]+}}
; CHECK-BE: vmov r1, r0, d16 ; CHECK-BE: vmov r1, r0, {{d[0-9]+}}
call void @arg_double( double 1.0 ) call void @arg_double( double 1.0 )
ret void ret void
} }
@ -104,8 +104,8 @@ define void @caller_return_longint() {
define void @caller_return_double() { define void @caller_return_double() {
; CHECK-LABEL: caller_return_double: ; CHECK-LABEL: caller_return_double:
; CHECK-LE: vmov d17, r0, r1 ; CHECK-LE: vmov {{d[0-9]+}}, r0, r1
; CHECK-BE: vmov d17, r1, r0 ; CHECK-BE: vmov {{d[0-9]+}}, r1, r0
%val = call double @return_double( ) %val = call double @return_double( )
%tmp = fadd double %val, 3.14 %tmp = fadd double %val, 3.14
store double %tmp, double* @vardouble store double %tmp, double* @vardouble
@ -120,4 +120,3 @@ define void @caller_return_v2f64() {
store double %tmp, double* @vardouble store double %tmp, double* @vardouble
ret void ret void
} }