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Add aliases for mfvrsave/mtvrsave. 

Update a test as we're now going to emit it for easier reading of
generated assembly as well.

llvm-svn: 272339
This commit is contained in:
Eric Christopher 2016-06-09 23:27:48 +00:00
parent e2bd9a32bc
commit 1dbb23e162
3 changed files with 12 additions and 2 deletions
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4
llvm/lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -2345,6 +2345,10 @@ let isCodeGenOnly = 1 in {
PPC970_DGroup_First, PPC970_Unit_FXU;
}
// Aliases for mtvrsave/mfvrsave to mfspr/mtspr.
def : InstAlias<"mtvrsave $rS", (MTVRSAVE gprc:$rS)>;
def : InstAlias<"mfvrsave $rS", (MFVRSAVE gprc:$rS)>;
// SPILL_VRSAVE - Indicate that we're dumping the VRSAVE register,
// so we'll need to scavenge a register for it.
let mayStore = 1 in

4
llvm/test/CodeGen/PowerPC/vrsave-spill.ll
View File

@ -10,8 +10,8 @@ entry:
br label %return
; CHECK: @foo
; CHECK: mfspr r{{[0-9]+}}, 256
; CHECK: mtspr 256, r{{[0-9]+}}
; CHECK: mfvrsave r{{[0-9]+}}
; CHECK: mtvrsave r{{[0-9]+}}
return: ; preds = %entry
ret <4 x float> %d

6
llvm/test/MC/PowerPC/ppc64-encoding-ext.s
View File

@ -3497,6 +3497,12 @@
# CHECK-BE: mfctr 2 # encoding: [0x7c,0x49,0x02,0xa6]
# CHECK-LE: mfctr 2 # encoding: [0xa6,0x02,0x49,0x7c]
mfctr 2
# CHECK-BE: mfvrsave 2 # encoding: [0x7c,0x40,0x42,0xa6]
# CHECK-LE: mfvrsave 2 # encoding: [0xa6,0x42,0x40,0x7c]
mfvrsave 2
# CHECK-BE: mtvrsave 2 # encoding: [0x7c,0x40,0x43,0xa6]
# CHECK-LE: mtvrsave 2 # encoding: [0xa6,0x43,0x40,0x7c]
mtvrsave 2
# Miscellaneous mnemonics