[NFC] Fix semantic discrepancy for MVT::LAST_VALUETYPE

Differential Revision: https://reviews.llvm.org/D103251
This commit is contained in:
Guillaume Chatelet 2021-06-07 10:04:16 +00:00
parent 131343d35b
commit 1da2c7d25c
4 changed files with 208 additions and 206 deletions

View File

@ -901,7 +901,7 @@ public:
class ValueTypeActionImpl {
/// ValueTypeActions - For each value type, keep a LegalizeTypeAction enum
/// that indicates how instruction selection should deal with the type.
LegalizeTypeAction ValueTypeActions[MVT::LAST_VALUETYPE];
LegalizeTypeAction ValueTypeActions[MVT::VALUETYPE_SIZE];
public:
ValueTypeActionImpl() {
@ -1228,8 +1228,8 @@ public:
if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::LAST_VALUETYPE &&
MemI < MVT::LAST_VALUETYPE && "Table isn't big enough!");
assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::VALUETYPE_SIZE &&
MemI < MVT::VALUETYPE_SIZE && "Table isn't big enough!");
unsigned Shift = 4 * ExtType;
return (LegalizeAction)((LoadExtActions[ValI][MemI] >> Shift) & 0xf);
}
@ -1253,7 +1253,7 @@ public:
if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
assert(ValI < MVT::LAST_VALUETYPE && MemI < MVT::LAST_VALUETYPE &&
assert(ValI < MVT::VALUETYPE_SIZE && MemI < MVT::VALUETYPE_SIZE &&
"Table isn't big enough!");
return TruncStoreActions[ValI][MemI];
}
@ -2938,9 +2938,9 @@ private:
/// This indicates the default register class to use for each ValueType the
/// target supports natively.
const TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
uint16_t NumRegistersForVT[MVT::LAST_VALUETYPE];
MVT RegisterTypeForVT[MVT::LAST_VALUETYPE];
const TargetRegisterClass *RegClassForVT[MVT::VALUETYPE_SIZE];
uint16_t NumRegistersForVT[MVT::VALUETYPE_SIZE];
MVT RegisterTypeForVT[MVT::VALUETYPE_SIZE];
/// This indicates the "representative" register class to use for each
/// ValueType the target supports natively. This information is used by the
@ -2948,36 +2948,36 @@ private:
/// register class is the largest legal super-reg register class of the
/// register class of the specified type. e.g. On x86, i8, i16, and i32's
/// representative class would be GR32.
const TargetRegisterClass *RepRegClassForVT[MVT::LAST_VALUETYPE];
const TargetRegisterClass *RepRegClassForVT[MVT::VALUETYPE_SIZE];
/// This indicates the "cost" of the "representative" register class for each
/// ValueType. The cost is used by the scheduler to approximate register
/// pressure.
uint8_t RepRegClassCostForVT[MVT::LAST_VALUETYPE];
uint8_t RepRegClassCostForVT[MVT::VALUETYPE_SIZE];
/// For any value types we are promoting or expanding, this contains the value
/// type that we are changing to. For Expanded types, this contains one step
/// of the expand (e.g. i64 -> i32), even if there are multiple steps required
/// (e.g. i64 -> i16). For types natively supported by the system, this holds
/// the same type (e.g. i32 -> i32).
MVT TransformToType[MVT::LAST_VALUETYPE];
MVT TransformToType[MVT::VALUETYPE_SIZE];
/// For each operation and each value type, keep a LegalizeAction that
/// indicates how instruction selection should deal with the operation. Most
/// operations are Legal (aka, supported natively by the target), but
/// operations that are not should be described. Note that operations on
/// non-legal value types are not described here.
LegalizeAction OpActions[MVT::LAST_VALUETYPE][ISD::BUILTIN_OP_END];
LegalizeAction OpActions[MVT::VALUETYPE_SIZE][ISD::BUILTIN_OP_END];
/// For each load extension type and each value type, keep a LegalizeAction
/// that indicates how instruction selection should deal with a load of a
/// specific value type and extension type. Uses 4-bits to store the action
/// for each of the 4 load ext types.
uint16_t LoadExtActions[MVT::LAST_VALUETYPE][MVT::LAST_VALUETYPE];
uint16_t LoadExtActions[MVT::VALUETYPE_SIZE][MVT::VALUETYPE_SIZE];
/// For each value type pair keep a LegalizeAction that indicates whether a
/// truncating store of a specific value type and truncating type is legal.
LegalizeAction TruncStoreActions[MVT::LAST_VALUETYPE][MVT::LAST_VALUETYPE];
LegalizeAction TruncStoreActions[MVT::VALUETYPE_SIZE][MVT::VALUETYPE_SIZE];
/// For each indexed mode and each value type, keep a quad of LegalizeAction
/// that indicates how instruction selection should deal with the load /
@ -2985,15 +2985,15 @@ private:
///
/// The first dimension is the value_type for the reference. The second
/// dimension represents the various modes for load store.
uint16_t IndexedModeActions[MVT::LAST_VALUETYPE][ISD::LAST_INDEXED_MODE];
uint16_t IndexedModeActions[MVT::VALUETYPE_SIZE][ISD::LAST_INDEXED_MODE];
/// For each condition code (ISD::CondCode) keep a LegalizeAction that
/// indicates how instruction selection should deal with the condition code.
///
/// Because each CC action takes up 4 bits, we need to have the array size be
/// large enough to fit all of the value types. This can be done by rounding
/// up the MVT::LAST_VALUETYPE value to the next multiple of 8.
uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::LAST_VALUETYPE + 7) / 8];
/// up the MVT::VALUETYPE_SIZE value to the next multiple of 8.
uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::VALUETYPE_SIZE + 7) / 8];
ValueTypeActionImpl ValueTypeActions;

View File

@ -36,135 +36,135 @@ namespace llvm {
// If you change this numbering, you must change the values in
// ValueTypes.td as well!
Other = 1, // This is a non-standard value
i1 = 2, // This is a 1 bit integer value
i8 = 3, // This is an 8 bit integer value
i16 = 4, // This is a 16 bit integer value
i32 = 5, // This is a 32 bit integer value
i64 = 6, // This is a 64 bit integer value
i128 = 7, // This is a 128 bit integer value
Other = 1, // This is a non-standard value
i1 = 2, // This is a 1 bit integer value
i8 = 3, // This is an 8 bit integer value
i16 = 4, // This is a 16 bit integer value
i32 = 5, // This is a 32 bit integer value
i64 = 6, // This is a 64 bit integer value
i128 = 7, // This is a 128 bit integer value
FIRST_INTEGER_VALUETYPE = i1,
LAST_INTEGER_VALUETYPE = i128,
LAST_INTEGER_VALUETYPE = i128,
bf16 = 8, // This is a 16 bit brain floating point value
f16 = 9, // This is a 16 bit floating point value
f32 = 10, // This is a 32 bit floating point value
f64 = 11, // This is a 64 bit floating point value
f80 = 12, // This is a 80 bit floating point value
f128 = 13, // This is a 128 bit floating point value
ppcf128 = 14, // This is a PPC 128-bit floating point value
bf16 = 8, // This is a 16 bit brain floating point value
f16 = 9, // This is a 16 bit floating point value
f32 = 10, // This is a 32 bit floating point value
f64 = 11, // This is a 64 bit floating point value
f80 = 12, // This is a 80 bit floating point value
f128 = 13, // This is a 128 bit floating point value
ppcf128 = 14, // This is a PPC 128-bit floating point value
FIRST_FP_VALUETYPE = bf16,
LAST_FP_VALUETYPE = ppcf128,
LAST_FP_VALUETYPE = ppcf128,
v1i1 = 15, // 1 x i1
v2i1 = 16, // 2 x i1
v4i1 = 17, // 4 x i1
v8i1 = 18, // 8 x i1
v16i1 = 19, // 16 x i1
v32i1 = 20, // 32 x i1
v64i1 = 21, // 64 x i1
v128i1 = 22, // 128 x i1
v256i1 = 23, // 256 x i1
v512i1 = 24, // 512 x i1
v1024i1 = 25, // 1024 x i1
v1i1 = 15, // 1 x i1
v2i1 = 16, // 2 x i1
v4i1 = 17, // 4 x i1
v8i1 = 18, // 8 x i1
v16i1 = 19, // 16 x i1
v32i1 = 20, // 32 x i1
v64i1 = 21, // 64 x i1
v128i1 = 22, // 128 x i1
v256i1 = 23, // 256 x i1
v512i1 = 24, // 512 x i1
v1024i1 = 25, // 1024 x i1
v1i8 = 26, // 1 x i8
v2i8 = 27, // 2 x i8
v4i8 = 28, // 4 x i8
v8i8 = 29, // 8 x i8
v16i8 = 30, // 16 x i8
v32i8 = 31, // 32 x i8
v64i8 = 32, // 64 x i8
v128i8 = 33, // 128 x i8
v256i8 = 34, // 256 x i8
v1i8 = 26, // 1 x i8
v2i8 = 27, // 2 x i8
v4i8 = 28, // 4 x i8
v8i8 = 29, // 8 x i8
v16i8 = 30, // 16 x i8
v32i8 = 31, // 32 x i8
v64i8 = 32, // 64 x i8
v128i8 = 33, // 128 x i8
v256i8 = 34, // 256 x i8
v1i16 = 35, // 1 x i16
v2i16 = 36, // 2 x i16
v3i16 = 37, // 3 x i16
v4i16 = 38, // 4 x i16
v8i16 = 39, // 8 x i16
v16i16 = 40, // 16 x i16
v32i16 = 41, // 32 x i16
v64i16 = 42, // 64 x i16
v128i16 = 43, // 128 x i16
v256i16 = 44, // 256 x i16
v1i16 = 35, // 1 x i16
v2i16 = 36, // 2 x i16
v3i16 = 37, // 3 x i16
v4i16 = 38, // 4 x i16
v8i16 = 39, // 8 x i16
v16i16 = 40, // 16 x i16
v32i16 = 41, // 32 x i16
v64i16 = 42, // 64 x i16
v128i16 = 43, // 128 x i16
v256i16 = 44, // 256 x i16
v1i32 = 45, // 1 x i32
v2i32 = 46, // 2 x i32
v3i32 = 47, // 3 x i32
v4i32 = 48, // 4 x i32
v5i32 = 49, // 5 x i32
v8i32 = 50, // 8 x i32
v16i32 = 51, // 16 x i32
v32i32 = 52, // 32 x i32
v64i32 = 53, // 64 x i32
v128i32 = 54, // 128 x i32
v256i32 = 55, // 256 x i32
v512i32 = 56, // 512 x i32
v1024i32 = 57, // 1024 x i32
v2048i32 = 58, // 2048 x i32
v1i32 = 45, // 1 x i32
v2i32 = 46, // 2 x i32
v3i32 = 47, // 3 x i32
v4i32 = 48, // 4 x i32
v5i32 = 49, // 5 x i32
v8i32 = 50, // 8 x i32
v16i32 = 51, // 16 x i32
v32i32 = 52, // 32 x i32
v64i32 = 53, // 64 x i32
v128i32 = 54, // 128 x i32
v256i32 = 55, // 256 x i32
v512i32 = 56, // 512 x i32
v1024i32 = 57, // 1024 x i32
v2048i32 = 58, // 2048 x i32
v1i64 = 59, // 1 x i64
v2i64 = 60, // 2 x i64
v4i64 = 61, // 4 x i64
v8i64 = 62, // 8 x i64
v16i64 = 63, // 16 x i64
v32i64 = 64, // 32 x i64
v64i64 = 65, // 64 x i64
v128i64 = 66, // 128 x i64
v256i64 = 67, // 256 x i64
v1i64 = 59, // 1 x i64
v2i64 = 60, // 2 x i64
v4i64 = 61, // 4 x i64
v8i64 = 62, // 8 x i64
v16i64 = 63, // 16 x i64
v32i64 = 64, // 32 x i64
v64i64 = 65, // 64 x i64
v128i64 = 66, // 128 x i64
v256i64 = 67, // 256 x i64
v1i128 = 68, // 1 x i128
v1i128 = 68, // 1 x i128
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
v1f16 = 69, // 1 x f16
v2f16 = 70, // 2 x f16
v3f16 = 71, // 3 x f16
v4f16 = 72, // 4 x f16
v8f16 = 73, // 8 x f16
v16f16 = 74, // 16 x f16
v32f16 = 75, // 32 x f16
v64f16 = 76, // 64 x f16
v128f16 = 77, // 128 x f16
v256f16 = 78, // 256 x f16
v1f16 = 69, // 1 x f16
v2f16 = 70, // 2 x f16
v3f16 = 71, // 3 x f16
v4f16 = 72, // 4 x f16
v8f16 = 73, // 8 x f16
v16f16 = 74, // 16 x f16
v32f16 = 75, // 32 x f16
v64f16 = 76, // 64 x f16
v128f16 = 77, // 128 x f16
v256f16 = 78, // 256 x f16
v2bf16 = 79, // 2 x bf16
v3bf16 = 80, // 3 x bf16
v4bf16 = 81, // 4 x bf16
v8bf16 = 82, // 8 x bf16
v16bf16 = 83, // 16 x bf16
v32bf16 = 84, // 32 x bf16
v64bf16 = 85, // 64 x bf16
v128bf16 = 86, // 128 x bf16
v2bf16 = 79, // 2 x bf16
v3bf16 = 80, // 3 x bf16
v4bf16 = 81, // 4 x bf16
v8bf16 = 82, // 8 x bf16
v16bf16 = 83, // 16 x bf16
v32bf16 = 84, // 32 x bf16
v64bf16 = 85, // 64 x bf16
v128bf16 = 86, // 128 x bf16
v1f32 = 87, // 1 x f32
v2f32 = 88, // 2 x f32
v3f32 = 89, // 3 x f32
v4f32 = 90, // 4 x f32
v5f32 = 91, // 5 x f32
v8f32 = 92, // 8 x f32
v16f32 = 93, // 16 x f32
v32f32 = 94, // 32 x f32
v64f32 = 95, // 64 x f32
v128f32 = 96, // 128 x f32
v256f32 = 97, // 256 x f32
v512f32 = 98, // 512 x f32
v1024f32 = 99, // 1024 x f32
v2048f32 = 100, // 2048 x f32
v1f32 = 87, // 1 x f32
v2f32 = 88, // 2 x f32
v3f32 = 89, // 3 x f32
v4f32 = 90, // 4 x f32
v5f32 = 91, // 5 x f32
v8f32 = 92, // 8 x f32
v16f32 = 93, // 16 x f32
v32f32 = 94, // 32 x f32
v64f32 = 95, // 64 x f32
v128f32 = 96, // 128 x f32
v256f32 = 97, // 256 x f32
v512f32 = 98, // 512 x f32
v1024f32 = 99, // 1024 x f32
v2048f32 = 100, // 2048 x f32
v1f64 = 101, // 1 x f64
v2f64 = 102, // 2 x f64
v4f64 = 103, // 4 x f64
v8f64 = 104, // 8 x f64
v16f64 = 105, // 16 x f64
v32f64 = 106, // 32 x f64
v64f64 = 107, // 64 x f64
v128f64 = 108, // 128 x f64
v256f64 = 109, // 256 x f64
v1f64 = 101, // 1 x f64
v2f64 = 102, // 2 x f64
v4f64 = 103, // 4 x f64
v8f64 = 104, // 8 x f64
v16f64 = 105, // 16 x f64
v32f64 = 106, // 32 x f64
v64f64 = 107, // 64 x f64
v128f64 = 108, // 128 x f64
v256f64 = 109, // 256 x f64
FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16,
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
@ -172,68 +172,68 @@ namespace llvm {
FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
nxv1i1 = 110, // n x 1 x i1
nxv2i1 = 111, // n x 2 x i1
nxv4i1 = 112, // n x 4 x i1
nxv8i1 = 113, // n x 8 x i1
nxv16i1 = 114, // n x 16 x i1
nxv32i1 = 115, // n x 32 x i1
nxv64i1 = 116, // n x 64 x i1
nxv1i1 = 110, // n x 1 x i1
nxv2i1 = 111, // n x 2 x i1
nxv4i1 = 112, // n x 4 x i1
nxv8i1 = 113, // n x 8 x i1
nxv16i1 = 114, // n x 16 x i1
nxv32i1 = 115, // n x 32 x i1
nxv64i1 = 116, // n x 64 x i1
nxv1i8 = 117, // n x 1 x i8
nxv2i8 = 118, // n x 2 x i8
nxv4i8 = 119, // n x 4 x i8
nxv8i8 = 120, // n x 8 x i8
nxv16i8 = 121, // n x 16 x i8
nxv32i8 = 122, // n x 32 x i8
nxv64i8 = 123, // n x 64 x i8
nxv1i8 = 117, // n x 1 x i8
nxv2i8 = 118, // n x 2 x i8
nxv4i8 = 119, // n x 4 x i8
nxv8i8 = 120, // n x 8 x i8
nxv16i8 = 121, // n x 16 x i8
nxv32i8 = 122, // n x 32 x i8
nxv64i8 = 123, // n x 64 x i8
nxv1i16 = 124, // n x 1 x i16
nxv2i16 = 125, // n x 2 x i16
nxv4i16 = 126, // n x 4 x i16
nxv8i16 = 127, // n x 8 x i16
nxv16i16 = 128, // n x 16 x i16
nxv32i16 = 129, // n x 32 x i16
nxv1i16 = 124, // n x 1 x i16
nxv2i16 = 125, // n x 2 x i16
nxv4i16 = 126, // n x 4 x i16
nxv8i16 = 127, // n x 8 x i16
nxv16i16 = 128, // n x 16 x i16
nxv32i16 = 129, // n x 32 x i16
nxv1i32 = 130, // n x 1 x i32
nxv2i32 = 131, // n x 2 x i32
nxv4i32 = 132, // n x 4 x i32
nxv8i32 = 133, // n x 8 x i32
nxv16i32 = 134, // n x 16 x i32
nxv32i32 = 135, // n x 32 x i32
nxv1i32 = 130, // n x 1 x i32
nxv2i32 = 131, // n x 2 x i32
nxv4i32 = 132, // n x 4 x i32
nxv8i32 = 133, // n x 8 x i32
nxv16i32 = 134, // n x 16 x i32
nxv32i32 = 135, // n x 32 x i32
nxv1i64 = 136, // n x 1 x i64
nxv2i64 = 137, // n x 2 x i64
nxv4i64 = 138, // n x 4 x i64
nxv8i64 = 139, // n x 8 x i64
nxv16i64 = 140, // n x 16 x i64
nxv32i64 = 141, // n x 32 x i64
nxv1i64 = 136, // n x 1 x i64
nxv2i64 = 137, // n x 2 x i64
nxv4i64 = 138, // n x 4 x i64
nxv8i64 = 139, // n x 8 x i64
nxv16i64 = 140, // n x 16 x i64
nxv32i64 = 141, // n x 32 x i64
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,
nxv1f16 = 142, // n x 1 x f16
nxv2f16 = 143, // n x 2 x f16
nxv4f16 = 144, // n x 4 x f16
nxv8f16 = 145, // n x 8 x f16
nxv16f16 = 146, // n x 16 x f16
nxv32f16 = 147, // n x 32 x f16
nxv1f16 = 142, // n x 1 x f16
nxv2f16 = 143, // n x 2 x f16
nxv4f16 = 144, // n x 4 x f16
nxv8f16 = 145, // n x 8 x f16
nxv16f16 = 146, // n x 16 x f16
nxv32f16 = 147, // n x 32 x f16
nxv1bf16 = 148, // n x 1 x bf16
nxv2bf16 = 149, // n x 2 x bf16
nxv4bf16 = 150, // n x 4 x bf16
nxv8bf16 = 151, // n x 8 x bf16
nxv1bf16 = 148, // n x 1 x bf16
nxv2bf16 = 149, // n x 2 x bf16
nxv4bf16 = 150, // n x 4 x bf16
nxv8bf16 = 151, // n x 8 x bf16
nxv1f32 = 152, // n x 1 x f32
nxv2f32 = 153, // n x 2 x f32
nxv4f32 = 154, // n x 4 x f32
nxv8f32 = 155, // n x 8 x f32
nxv16f32 = 156, // n x 16 x f32
nxv1f32 = 152, // n x 1 x f32
nxv2f32 = 153, // n x 2 x f32
nxv4f32 = 154, // n x 4 x f32
nxv8f32 = 155, // n x 8 x f32
nxv16f32 = 156, // n x 16 x f32
nxv1f64 = 157, // n x 1 x f64
nxv2f64 = 158, // n x 2 x f64
nxv4f64 = 159, // n x 4 x f64
nxv8f64 = 160, // n x 8 x f64
nxv1f64 = 157, // n x 1 x f64
nxv2f64 = 158, // n x 2 x f64
nxv4f64 = 159, // n x 4 x f64
nxv8f64 = 160, // n x 8 x f64
FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,
LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
@ -242,24 +242,25 @@ namespace llvm {
LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64,
LAST_VECTOR_VALUETYPE = nxv8f64,
x86mmx = 161, // This is an X86 MMX value
x86mmx = 161, // This is an X86 MMX value
Glue = 162, // This glues nodes together during pre-RA sched
Glue = 162, // This glues nodes together during pre-RA sched
isVoid = 163, // This has no value
isVoid = 163, // This has no value
Untyped = 164, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
Untyped = 164, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
funcref = 165, // WebAssembly's funcref type
externref = 166, // WebAssembly's externref type
x86amx = 167, // This is an X86 AMX value
funcref = 165, // WebAssembly's funcref type
externref = 166, // WebAssembly's externref type
x86amx = 167, // This is an X86 AMX value
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
LAST_VALUETYPE = 168, // This always remains at the end of the list.
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
LAST_VALUETYPE = x86amx, // This always remains at the end of the list.
VALUETYPE_SIZE = LAST_VALUETYPE + 1,
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@ -267,38 +268,38 @@ namespace llvm {
MAX_ALLOWED_VALUETYPE = 192,
// A value of type llvm::TokenTy
token = 248,
token = 248,
// This is MDNode or MDString.
Metadata = 249,
Metadata = 249,
// An int value the size of the pointer of the current
// target to any address space. This must only be used internal to
// tblgen. Other than for overloading, we treat iPTRAny the same as iPTR.
iPTRAny = 250,
iPTRAny = 250,
// A vector with any length and element size. This is used
// for intrinsics that have overloadings based on vector types.
// This is only for tblgen's consumption!
vAny = 251,
vAny = 251,
// Any floating-point or vector floating-point value. This is used
// for intrinsics that have overloadings based on floating-point types.
// This is only for tblgen's consumption!
fAny = 252,
fAny = 252,
// An integer or vector integer value of any bit width. This is
// used for intrinsics that have overloadings based on integer bit widths.
// This is only for tblgen's consumption!
iAny = 253,
iAny = 253,
// An int value the size of the pointer of the current
// target. This should only be used internal to tblgen!
iPTR = 254,
iPTR = 254,
// Any type. This is used for intrinsics that have overloadings.
// This is only for tblgen's consumption!
Any = 255
Any = 255
};
SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE;
@ -316,7 +317,7 @@ namespace llvm {
/// Return true if this is a valid simple valuetype.
bool isValid() const {
return (SimpleTy >= MVT::FIRST_VALUETYPE &&
SimpleTy < MVT::LAST_VALUETYPE);
SimpleTy <= MVT::LAST_VALUETYPE);
}
/// Return true if this is a FP or a vector FP type.
@ -1368,7 +1369,8 @@ namespace llvm {
/// SimpleValueType Iteration
/// @{
static mvt_range all_valuetypes() {
return mvt_range(MVT::FIRST_VALUETYPE, MVT::LAST_VALUETYPE);
return mvt_range(MVT::FIRST_VALUETYPE,
(MVT::SimpleValueType)(MVT::LAST_VALUETYPE + 1));
}
static mvt_range integer_valuetypes() {

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@ -9665,8 +9665,8 @@ namespace {
std::vector<EVT> VTs;
EVTArray() {
VTs.reserve(MVT::LAST_VALUETYPE);
for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
VTs.reserve(MVT::VALUETYPE_SIZE);
for (unsigned i = 0; i < MVT::VALUETYPE_SIZE; ++i)
VTs.push_back(MVT((MVT::SimpleValueType)i));
}
};
@ -9684,7 +9684,7 @@ const EVT *SDNode::getValueTypeList(EVT VT) {
sys::SmartScopedLock<true> Lock(*VTMutex);
return &(*EVTs->insert(VT).first);
}
assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && "Value type out of range!");
assert(VT.getSimpleVT() < MVT::VALUETYPE_SIZE && "Value type out of range!");
return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
}

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@ -1279,11 +1279,11 @@ TargetLoweringBase::findRepresentativeClass(const TargetRegisterInfo *TRI,
/// this allows us to compute derived properties we expose.
void TargetLoweringBase::computeRegisterProperties(
const TargetRegisterInfo *TRI) {
static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
static_assert(MVT::VALUETYPE_SIZE <= MVT::MAX_ALLOWED_VALUETYPE,
"Too many value types for ValueTypeActions to hold!");
// Everything defaults to needing one register.
for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
for (unsigned i = 0; i != MVT::VALUETYPE_SIZE; ++i) {
NumRegistersForVT[i] = 1;
RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
}
@ -1495,7 +1495,7 @@ void TargetLoweringBase::computeRegisterProperties(
// not a sub-register class / subreg register class) legal register class for
// a group of value types. For example, on i386, i8, i16, and i32
// representative would be GR32; while on x86_64 it's GR64.
for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
for (unsigned i = 0; i != MVT::VALUETYPE_SIZE; ++i) {
const TargetRegisterClass* RRC;
uint8_t Cost;
std::tie(RRC, Cost) = findRepresentativeClass(TRI, (MVT::SimpleValueType)i);