forked from OSchip/llvm-project
[BasicTTIImpl] Fix getCastInstrCost for scalable vectors by querying for ElementCount.
This fixes an overly restrictive assumption that the vector is a FixedVectorType, in code that tries to calculate the cost of a cast operation when splitting a too-wide vector. The algorithm works the same for scalable vectors, so this patch removes the cast<FixedVectorType>. Reviewed By: david-arm Differential Revision: https://reviews.llvm.org/D96253
This commit is contained in:
parent
f0f5afc4dd
commit
1d42ba254f
|
@ -852,9 +852,8 @@ public:
|
|||
bool SplitDst =
|
||||
TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
|
||||
TargetLowering::TypeSplitVector;
|
||||
if ((SplitSrc || SplitDst) &&
|
||||
cast<FixedVectorType>(SrcVTy)->getNumElements() > 1 &&
|
||||
cast<FixedVectorType>(DstVTy)->getNumElements() > 1) {
|
||||
if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isVector() &&
|
||||
DstVTy->getElementCount().isVector()) {
|
||||
Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
|
||||
Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
|
||||
T *TTI = static_cast<T *>(this);
|
||||
|
|
|
@ -696,7 +696,7 @@ define i32 @bitcasts() {
|
|||
ret i32 undef
|
||||
}
|
||||
|
||||
define i32 @load_extends() {
|
||||
define i32 @load_extends() #0 {
|
||||
; CHECK-LABEL: 'load_extends'
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadi8 = load i8, i8* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadi16 = load i16, i16* undef
|
||||
|
@ -708,6 +708,8 @@ define i32 @load_extends() {
|
|||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadv4i16 = load <4 x i16>, <4 x i16>* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadv2i32 = load <2 x i32>, <2 x i32>* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadv4i32 = load <4 x i32>, <4 x i32>* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadnxv2i32 = load <vscale x 2 x i32>, <vscale x 2 x i32>* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %loadnxv4i32 = load <vscale x 4 x i32>, <vscale x 4 x i32>* undef
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r0 = sext i8 %loadi8 to i16
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r1 = zext i8 %loadi8 to i16
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r2 = sext i8 %loadi8 to i32
|
||||
|
@ -734,6 +736,10 @@ define i32 @load_extends() {
|
|||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v11 = zext <2 x i32> %loadv2i32 to <2 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v12 = sext <4 x i32> %loadv4i32 to <4 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v13 = zext <4 x i32> %loadv4i32 to <4 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v14 = sext <vscale x 2 x i32> %loadnxv2i32 to <vscale x 2 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v15 = zext <vscale x 2 x i32> %loadnxv2i32 to <vscale x 2 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16 = sext <vscale x 4 x i32> %loadnxv4i32 to <vscale x 4 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v17 = zext <vscale x 4 x i32> %loadnxv4i32 to <vscale x 4 x i64>
|
||||
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
|
||||
;
|
||||
%loadi8 = load i8, i8* undef
|
||||
|
@ -746,6 +752,8 @@ define i32 @load_extends() {
|
|||
%loadv4i16 = load <4 x i16>, <4 x i16>* undef
|
||||
%loadv2i32 = load <2 x i32>, <2 x i32>* undef
|
||||
%loadv4i32 = load <4 x i32>, <4 x i32>* undef
|
||||
%loadnxv2i32 = load <vscale x 2 x i32>, <vscale x 2 x i32>* undef
|
||||
%loadnxv4i32 = load <vscale x 4 x i32>, <vscale x 4 x i32>* undef
|
||||
|
||||
%r0 = sext i8 %loadi8 to i16
|
||||
%r1 = zext i8 %loadi8 to i16
|
||||
|
@ -774,6 +782,10 @@ define i32 @load_extends() {
|
|||
%v11 = zext <2 x i32> %loadv2i32 to <2 x i64>
|
||||
%v12 = sext <4 x i32> %loadv4i32 to <4 x i64>
|
||||
%v13 = zext <4 x i32> %loadv4i32 to <4 x i64>
|
||||
%v14 = sext <vscale x 2 x i32> %loadnxv2i32 to <vscale x 2 x i64>
|
||||
%v15 = zext <vscale x 2 x i32> %loadnxv2i32 to <vscale x 2 x i64>
|
||||
%v16 = sext <vscale x 4 x i32> %loadnxv4i32 to <vscale x 4 x i64>
|
||||
%v17 = zext <vscale x 4 x i32> %loadnxv4i32 to <vscale x 4 x i64>
|
||||
|
||||
ret i32 undef
|
||||
}
|
||||
|
@ -808,3 +820,5 @@ define i32 @store_truncs() {
|
|||
store i8 %r5, i8* undef
|
||||
ret i32 undef
|
||||
}
|
||||
|
||||
attributes #0 = { "target-features"="+sve" }
|
||||
|
|
Loading…
Reference in New Issue