forked from OSchip/llvm-project
[BOLT] Remove ineligible macro-fusion patterns
Summary: Remove patterns ineligible for macro-fusion: - First instruction has a memory destination This is a temporary commit to align BOLT with LLVM MC interfaces. (cherry picked from FBD33479340)
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@ -990,11 +990,16 @@ public:
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SecondInst.getOpcode() == X86::JRCXZ)
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return false;
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// Cannot fuse if first instruction operands are MEM-IMM.
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const MCInstrDesc &Desc = Info->get(FirstInst.getOpcode());
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int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags);
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if (MemOpNo != -1 && X86II::hasImm(Desc.TSFlags))
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if (MemOpNo != -1) {
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// Cannot fuse if first instruction operands are MEM-IMM.
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if (X86II::hasImm(Desc.TSFlags))
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return false;
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// Cannot fuse if first instruction may store.
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if (Desc.mayStore())
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return false;
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}
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// Cannot fuse if the first instruction uses RIP-relative memory.
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// FIXME: verify that this is true.
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