From 1d3c150748230eed2a6058ec3bf1c5a0f8ede55c Mon Sep 17 00:00:00 2001 From: Amir Ayupov Date: Fri, 7 Jan 2022 09:40:04 -0800 Subject: [PATCH] [BOLT] Remove ineligible macro-fusion patterns Summary: Remove patterns ineligible for macro-fusion: - First instruction has a memory destination This is a temporary commit to align BOLT with LLVM MC interfaces. (cherry picked from FBD33479340) --- bolt/lib/Target/X86/X86MCPlusBuilder.cpp | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp index c0fe7f0b4f26..69e1fa8606ef 100644 --- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp +++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp @@ -990,11 +990,16 @@ public: SecondInst.getOpcode() == X86::JRCXZ) return false; - // Cannot fuse if first instruction operands are MEM-IMM. const MCInstrDesc &Desc = Info->get(FirstInst.getOpcode()); int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags); - if (MemOpNo != -1 && X86II::hasImm(Desc.TSFlags)) - return false; + if (MemOpNo != -1) { + // Cannot fuse if first instruction operands are MEM-IMM. + if (X86II::hasImm(Desc.TSFlags)) + return false; + // Cannot fuse if first instruction may store. + if (Desc.mayStore()) + return false; + } // Cannot fuse if the first instruction uses RIP-relative memory. // FIXME: verify that this is true.