[LVI] Regenerate test checks; NFC

This commit is contained in:
Nikita Popov 2019-04-29 21:12:38 +02:00
parent 11850a6305
commit 1cfe3e6df9
3 changed files with 100 additions and 56 deletions

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@ -1,8 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S < %s -jump-threading | FileCheck %s ; RUN: opt -S < %s -jump-threading | FileCheck %s
; CHECK-LABEL: @foo
; CHECK-NEXT: exit2:
; CHECK-NEXT: ret void
define void @foo() { define void @foo() {
; CHECK-LABEL: define {{[^@]+}}@foo(
; CHECK-NEXT: exit2:
; CHECK-NEXT: ret void
;
entry: entry:
br label %bb1 br label %bb1

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@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -jump-threading < %s | FileCheck %s ; RUN: opt -S -jump-threading < %s | FileCheck %s
; Check that the heuristic for avoiding accidental introduction of irreducible ; Check that the heuristic for avoiding accidental introduction of irreducible
@ -7,93 +8,126 @@
declare void @opaque_body() declare void @opaque_body()
define void @jump_threading_loopheader() { define void @jump_threading_loopheader() {
; CHECK-LABEL: @jump_threading_loopheader ; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader(
; CHECK-NEXT: top:
; CHECK-NEXT: br label [[ENTRY:%.*]]
; CHECK: entry:
; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: call void @opaque_body()
; CHECK-NEXT: br label [[ENTRY]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
top: top:
br label %entry br label %entry
entry: entry:
%ind = phi i32 [0, %top], [%nextind, %latch] %ind = phi i32 [0, %top], [%nextind, %latch]
%nextind = add i32 %ind, 1 %nextind = add i32 %ind, 1
%cmp = icmp ule i32 %ind, 10 %cmp = icmp ule i32 %ind, 10
; CHECK: br i1 %cmp, label %latch, label %exit br i1 %cmp, label %body, label %latch
br i1 %cmp, label %body, label %latch
body: body:
call void @opaque_body() call void @opaque_body()
; CHECK: br label %entry br label %latch
br label %latch
latch: latch:
%cond = phi i2 [1, %entry], [2, %body] %cond = phi i2 [1, %entry], [2, %body]
switch i2 %cond, label %unreach [ switch i2 %cond, label %unreach [
i2 2, label %entry i2 2, label %entry
i2 1, label %exit i2 1, label %exit
] ]
unreach: unreach:
unreachable unreachable
exit: exit:
ret void ret void
} }
; We also need to check the opposite order of the branches, in the switch ; We also need to check the opposite order of the branches, in the switch
; instruction because jump-threading relies on that to decide which edge to ; instruction because jump-threading relies on that to decide which edge to
; try to thread first. ; try to thread first.
define void @jump_threading_loopheader2() { define void @jump_threading_loopheader2() {
; CHECK-LABEL: @jump_threading_loopheader2 ; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader2(
; CHECK-NEXT: top:
; CHECK-NEXT: br label [[ENTRY:%.*]]
; CHECK: entry:
; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LATCH]]
; CHECK: latch:
; CHECK-NEXT: br label [[ENTRY]]
; CHECK: exit:
; CHECK-NEXT: call void @opaque_body()
; CHECK-NEXT: ret void
;
top: top:
br label %entry br label %entry
entry: entry:
%ind = phi i32 [0, %top], [%nextind, %latch] %ind = phi i32 [0, %top], [%nextind, %latch]
%nextind = add i32 %ind, 1 %nextind = add i32 %ind, 1
%cmp = icmp ule i32 %ind, 10 %cmp = icmp ule i32 %ind, 10
; CHECK: br i1 %cmp, label %exit, label %latch br i1 %cmp, label %body, label %latch
br i1 %cmp, label %body, label %latch
body: body:
call void @opaque_body() call void @opaque_body()
; CHECK: br label %entry br label %latch
br label %latch
latch: latch:
%cond = phi i2 [1, %entry], [2, %body] %cond = phi i2 [1, %entry], [2, %body]
switch i2 %cond, label %unreach [ switch i2 %cond, label %unreach [
i2 1, label %entry i2 1, label %entry
i2 2, label %exit i2 2, label %exit
] ]
unreach: unreach:
unreachable unreachable
exit: exit:
ret void ret void
} }
; Check if we can handle undef branch condition. ; Check if we can handle undef branch condition.
define void @jump_threading_loopheader3() { define void @jump_threading_loopheader3() {
; CHECK-LABEL: @jump_threading_loopheader3 ; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader3(
; CHECK-NEXT: top:
; CHECK-NEXT: br label [[ENTRY:%.*]]
; CHECK: entry:
; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: call void @opaque_body()
; CHECK-NEXT: br label [[ENTRY]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
top: top:
br label %entry br label %entry
entry: entry:
%ind = phi i32 [0, %top], [%nextind, %latch] %ind = phi i32 [0, %top], [%nextind, %latch]
%nextind = add i32 %ind, 1 %nextind = add i32 %ind, 1
%cmp = icmp ule i32 %ind, 10 %cmp = icmp ule i32 %ind, 10
; CHECK: br i1 %cmp, label %latch, label %exit br i1 %cmp, label %body, label %latch
br i1 %cmp, label %body, label %latch
body: body:
call void @opaque_body() call void @opaque_body()
; CHECK: br label %entry br label %latch
br label %latch
latch: latch:
%phi = phi i32 [undef, %entry], [0, %body] %phi = phi i32 [undef, %entry], [0, %body]
%cmp1 = icmp eq i32 %phi, 0 %cmp1 = icmp eq i32 %phi, 0
br i1 %cmp1, label %entry, label %exit br i1 %cmp1, label %entry, label %exit
exit: exit:
ret void ret void
} }

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@ -1,15 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -jump-threading < %s | FileCheck %s ; RUN: opt -S -jump-threading < %s | FileCheck %s
define i8 @test(i32 %a, i32 %length) { define i8 @test(i32 %a, i32 %length) {
; CHECK-LABEL: @test ; CHECK-LABEL: define {{[^@]+}}@test(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BACKEDGE:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE]] ]
; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; CHECK-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; CHECK-NEXT: br i1 [[CONT]], label [[BACKEDGE]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i8 0
;
entry: entry:
; CHECK: br label %backedge
br label %loop br label %loop
loop: loop:
; CHECK-LABEL: backedge:
; CHECK: phi i32
; CHECK: br i1 %cont, label %backedge, label %exit
%iv = phi i32 [0, %entry], [%iv.next, %backedge] %iv = phi i32 [0, %entry], [%iv.next, %backedge]
;; We can use an inductive argument to prove %iv is always positive ;; We can use an inductive argument to prove %iv is always positive
%cnd = icmp sge i32 %iv, 0 %cnd = icmp sge i32 %iv, 0