forked from OSchip/llvm-project
[LVI] Regenerate test checks; NFC
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11850a6305
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1cfe3e6df9
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@ -1,8 +1,11 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S < %s -jump-threading | FileCheck %s
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; CHECK-LABEL: @foo
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; CHECK-NEXT: exit2:
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; CHECK-NEXT: ret void
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define void @foo() {
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; CHECK-LABEL: define {{[^@]+}}@foo(
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; CHECK-NEXT: exit2:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb1
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -jump-threading < %s | FileCheck %s
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; Check that the heuristic for avoiding accidental introduction of irreducible
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@ -7,93 +8,126 @@
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declare void @opaque_body()
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define void @jump_threading_loopheader() {
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; CHECK-LABEL: @jump_threading_loopheader
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; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader(
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; CHECK-NEXT: top:
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; CHECK-NEXT: br label [[ENTRY:%.*]]
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; CHECK: entry:
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; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
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; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: call void @opaque_body()
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; CHECK-NEXT: br label [[ENTRY]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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top:
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br label %entry
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br label %entry
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entry:
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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; CHECK: br i1 %cmp, label %latch, label %exit
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br i1 %cmp, label %body, label %latch
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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br i1 %cmp, label %body, label %latch
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body:
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call void @opaque_body()
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; CHECK: br label %entry
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br label %latch
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call void @opaque_body()
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br label %latch
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latch:
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%cond = phi i2 [1, %entry], [2, %body]
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switch i2 %cond, label %unreach [
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i2 2, label %entry
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i2 1, label %exit
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]
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%cond = phi i2 [1, %entry], [2, %body]
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switch i2 %cond, label %unreach [
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i2 2, label %entry
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i2 1, label %exit
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]
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unreach:
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unreachable
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unreachable
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exit:
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ret void
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ret void
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}
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; We also need to check the opposite order of the branches, in the switch
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; instruction because jump-threading relies on that to decide which edge to
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; try to thread first.
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define void @jump_threading_loopheader2() {
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; CHECK-LABEL: @jump_threading_loopheader2
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; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader2(
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; CHECK-NEXT: top:
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; CHECK-NEXT: br label [[ENTRY:%.*]]
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; CHECK: entry:
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; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: br label [[ENTRY]]
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; CHECK: exit:
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; CHECK-NEXT: call void @opaque_body()
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; CHECK-NEXT: ret void
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;
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top:
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br label %entry
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br label %entry
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entry:
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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; CHECK: br i1 %cmp, label %exit, label %latch
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br i1 %cmp, label %body, label %latch
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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br i1 %cmp, label %body, label %latch
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body:
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call void @opaque_body()
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; CHECK: br label %entry
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br label %latch
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call void @opaque_body()
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br label %latch
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latch:
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%cond = phi i2 [1, %entry], [2, %body]
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switch i2 %cond, label %unreach [
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i2 1, label %entry
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i2 2, label %exit
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]
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%cond = phi i2 [1, %entry], [2, %body]
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switch i2 %cond, label %unreach [
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i2 1, label %entry
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i2 2, label %exit
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]
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unreach:
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unreachable
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unreachable
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exit:
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ret void
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ret void
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}
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; Check if we can handle undef branch condition.
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define void @jump_threading_loopheader3() {
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; CHECK-LABEL: @jump_threading_loopheader3
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; CHECK-LABEL: define {{[^@]+}}@jump_threading_loopheader3(
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; CHECK-NEXT: top:
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; CHECK-NEXT: br label [[ENTRY:%.*]]
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; CHECK: entry:
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; CHECK-NEXT: [[IND:%.*]] = phi i32 [ 0, [[TOP:%.*]] ], [ [[NEXTIND:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[NEXTIND]] = add i32 [[IND]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[IND]], 10
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; CHECK-NEXT: br i1 [[CMP]], label [[LATCH]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: call void @opaque_body()
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; CHECK-NEXT: br label [[ENTRY]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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top:
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br label %entry
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br label %entry
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entry:
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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; CHECK: br i1 %cmp, label %latch, label %exit
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br i1 %cmp, label %body, label %latch
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%ind = phi i32 [0, %top], [%nextind, %latch]
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%nextind = add i32 %ind, 1
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%cmp = icmp ule i32 %ind, 10
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br i1 %cmp, label %body, label %latch
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body:
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call void @opaque_body()
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; CHECK: br label %entry
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br label %latch
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call void @opaque_body()
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br label %latch
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latch:
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%phi = phi i32 [undef, %entry], [0, %body]
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%cmp1 = icmp eq i32 %phi, 0
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br i1 %cmp1, label %entry, label %exit
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%phi = phi i32 [undef, %entry], [0, %body]
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%cmp1 = icmp eq i32 %phi, 0
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br i1 %cmp1, label %entry, label %exit
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exit:
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ret void
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ret void
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}
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@ -1,15 +1,22 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -jump-threading < %s | FileCheck %s
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define i8 @test(i32 %a, i32 %length) {
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; CHECK-LABEL: @test
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; CHECK-LABEL: define {{[^@]+}}@test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BACKEDGE:%.*]]
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; CHECK: backedge:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
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; CHECK-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
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; CHECK-NEXT: br i1 [[CONT]], label [[BACKEDGE]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret i8 0
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;
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entry:
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; CHECK: br label %backedge
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br label %loop
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loop:
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; CHECK-LABEL: backedge:
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; CHECK: phi i32
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; CHECK: br i1 %cont, label %backedge, label %exit
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%iv = phi i32 [0, %entry], [%iv.next, %backedge]
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;; We can use an inductive argument to prove %iv is always positive
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%cnd = icmp sge i32 %iv, 0
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