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Do not issue identity copies. 

llvm-svn: 52373
This commit is contained in:
Evan Cheng 2008-06-16 22:52:53 +00:00
parent 51ca6fa512
commit 1cde1f8d5e
2 changed files with 36 additions and 13 deletions
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35
llvm/lib/CodeGen/LowerSubregs.cpp
View File

@ -108,15 +108,20 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) {
DOUT << "subreg: CONVERTING: " << *MI;
// Insert sub-register copy
const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
if (DstSubReg == InsReg) {
// No need to insert an identify copy instruction.
DOUT << "subreg: eliminated!";
} else {
// Insert sub-register copy
const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
#endif
}
DOUT << "\n";
MBB->remove(MI);
@ -149,15 +154,19 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
DOUT << "subreg: CONVERTING: " << *MI;
// Insert sub-register copy
const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
if (DstSubReg == InsReg) {
// No need to insert an identify copy instruction.
DOUT << "subreg: eliminated!";
} else {
// Insert sub-register copy
const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
#ifndef NDEBUG
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
MachineBasicBlock::iterator dMI = MI;
DOUT << "subreg: " << *(--dMI);
#endif
}
DOUT << "\n";
MBB->remove(MI);

14
llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll Normal file
View File

@ -0,0 +1,14 @@
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 4
define i16 @test(i16* %tmp179) nounwind {
%tmp180 = load i16* %tmp179, align 2 ; <i16> [#uses=2]
%tmp184 = and i16 %tmp180, -1024 ; <i16> [#uses=1]
%tmp186 = icmp eq i16 %tmp184, -32768 ; <i1> [#uses=1]
br i1 %tmp186, label %bb189, label %bb288
bb189: ; preds = %0
ret i16 %tmp180
bb288: ; preds = %0
ret i16 32
}