forked from OSchip/llvm-project
[Hexagon] Add new packet iterator which will iterate through duplexes
Patch by Colin LeMahieu. llvm-svn: 301945
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@ -392,26 +392,20 @@ bool HexagonMCChecker::checkRegistersReadOnly() {
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}
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bool HexagonMCChecker::registerUsed(MCInst const &Inst, unsigned Register) {
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if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) {
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if (registerUsed(*Inst.getOperand(0).getInst(), Register) ||
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registerUsed(*Inst.getOperand(1).getInst(), Register))
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unsigned Defs = HexagonMCInstrInfo::getDesc(MCII, Inst).getNumDefs();
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for (unsigned j = Defs, n = Inst.getNumOperands(); j < n; ++j) {
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MCOperand const &Operand = Inst.getOperand(j);
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if (Operand.isReg() && Operand.getReg() == Register)
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return true;
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} else {
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unsigned Defs = HexagonMCInstrInfo::getDesc(MCII, Inst).getNumDefs();
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for (unsigned j = Defs, n = Inst.getNumOperands(); j < n; ++j) {
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MCOperand const &Operand = Inst.getOperand(j);
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if (Operand.isReg() && Operand.getReg() == Register)
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return true;
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}
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}
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return false;
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}
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bool HexagonMCChecker::registerUsed(unsigned Register) {
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auto Range = HexagonMCInstrInfo::bundleInstructions(MCB);
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return std::any_of(Range.begin(), Range.end(), [&](MCOperand const &Operand) {
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return registerUsed(*Operand.getInst(), Register);
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});
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for (auto const &I: HexagonMCInstrInfo::bundleInstructions(MCII, MCB))
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if (registerUsed(I, Register))
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return true;
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return false;
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}
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void HexagonMCChecker::checkRegisterCurDefs() {
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@ -22,6 +22,43 @@
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#include "llvm/MC/MCSubtargetInfo.h"
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namespace llvm {
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Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII,
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MCInst const &Inst)
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: MCII(MCII), BundleCurrent(Inst.begin() +
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HexagonMCInstrInfo::bundleInstructionsOffset),
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BundleEnd(Inst.end()), DuplexCurrent(Inst.end()), DuplexEnd(Inst.end()) {}
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Hexagon::PacketIterator::PacketIterator(MCInstrInfo const &MCII,
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MCInst const &Inst, std::nullptr_t)
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: MCII(MCII), BundleCurrent(Inst.end()), BundleEnd(Inst.end()),
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DuplexCurrent(Inst.end()), DuplexEnd(Inst.end()) {}
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Hexagon::PacketIterator &Hexagon::PacketIterator::operator++() {
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if (DuplexCurrent != DuplexEnd) {
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++DuplexCurrent;
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if (DuplexCurrent == DuplexEnd) {
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DuplexCurrent = BundleEnd;
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DuplexEnd = BundleEnd;
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}
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return *this;
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}
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++BundleCurrent;
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if (BundleCurrent != BundleEnd) {
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MCInst const &Inst = *BundleCurrent->getInst();
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if (HexagonMCInstrInfo::isDuplex(MCII, Inst)) {
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DuplexCurrent = Inst.begin();
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DuplexEnd = Inst.end();
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}
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}
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return *this;
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}
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MCInst const &Hexagon::PacketIterator::operator*() const {
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if (DuplexCurrent != DuplexEnd)
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return *DuplexCurrent->getInst();
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return *BundleCurrent->getInst();
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}
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bool Hexagon::PacketIterator::operator==(PacketIterator const &Other) const {
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return BundleCurrent == Other.BundleCurrent && BundleEnd == Other.BundleEnd &&
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DuplexCurrent == Other.DuplexCurrent && DuplexEnd == Other.DuplexEnd;
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}
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void HexagonMCInstrInfo::addConstant(MCInst &MI, uint64_t Value,
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MCContext &Context) {
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MI.addOperand(MCOperand::createExpr(MCConstantExpr::create(Value, Context)));
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@ -41,6 +78,14 @@ void HexagonMCInstrInfo::addConstExtender(MCContext &Context,
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MCB.addOperand(MCOperand::createInst(XMCI));
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}
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iterator_range<Hexagon::PacketIterator>
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HexagonMCInstrInfo::bundleInstructions(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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assert(isBundle(MCI));
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return make_range(Hexagon::PacketIterator(MCII, MCI),
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Hexagon::PacketIterator(MCII, MCI, nullptr));
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}
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iterator_range<MCInst::const_iterator>
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HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
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assert(isBundle(MCI));
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@ -292,7 +337,7 @@ int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
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}
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StringRef HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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MCInst const &MCI) {
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return MCII.getName(MCI.getOpcode());
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}
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@ -397,9 +442,8 @@ bool HexagonMCInstrInfo::hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI) {
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if (!HexagonMCInstrInfo::isBundle(MCI))
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return false;
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for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
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auto MI = I.getInst();
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if (HexagonMCInstrInfo::isDuplex(MCII, *MI))
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(MCII, MCI)) {
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if (HexagonMCInstrInfo::isDuplex(MCII, I))
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return true;
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}
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@ -410,13 +454,12 @@ bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) {
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return extenderForIndex(MCB, Index) != nullptr;
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}
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bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) {
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bool HexagonMCInstrInfo::hasImmExt( MCInst const &MCI) {
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if (!HexagonMCInstrInfo::isBundle(MCI))
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return false;
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for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
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auto MI = I.getInst();
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if (isImmext(*MI))
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if (isImmext(*I.getInst()))
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return true;
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}
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@ -818,4 +861,4 @@ unsigned HexagonMCInstrInfo::SubregisterBit(unsigned Consumer,
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return 0x1;
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return 0;
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}
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}
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} // namespace llvm
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@ -31,6 +31,25 @@ public:
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DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
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: packetIndexI(i), packetIndexJ(j), iClass(iClass) {}
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};
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namespace Hexagon {
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class PacketIterator {
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MCInstrInfo const &MCII;
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MCInst::const_iterator BundleCurrent;
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MCInst::const_iterator BundleEnd;
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MCInst::const_iterator DuplexCurrent;
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MCInst::const_iterator DuplexEnd;
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public:
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PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
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PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
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PacketIterator &operator++();
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MCInst const &operator*() const;
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bool operator==(PacketIterator const &Other) const;
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bool operator!=(PacketIterator const &Other) const {
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return !(*this == Other);
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}
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};
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} // namespace Hexagon
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namespace HexagonMCInstrInfo {
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size_t const innerLoopOffset = 0;
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int64_t const innerLoopMask = 1 << innerLoopOffset;
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@ -54,6 +73,8 @@ void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
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MCInst const &MCI);
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// Returns a iterator range of instructions in this bundle
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iterator_range<Hexagon::PacketIterator>
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bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
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iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI);
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// Returns the number of instructions in the bundle
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@ -283,7 +304,7 @@ unsigned SubregisterBit(unsigned Consumer, unsigned Producer,
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// Attempt to find and replace compound pairs
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void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
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MCContext &Context, MCInst &MCI);
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}
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}
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} // namespace HexagonMCInstrInfo
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
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