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fix what looks like a real logic bug, found by PVS-Studio (part of PR12357) 

llvm-svn: 153513
This commit is contained in:
Chris Lattner 2012-03-27 16:27:21 +00:00
parent 38c59108ad
commit 1cc25e8a40
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -7991,8 +7991,8 @@ bool DAGCombiner::SimplifySelectOps(SDNode *TheSelect, SDValue LHS,
if ((LLD->hasAnyUseOfValue(1) &&
(LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS))) ||
(LLD->hasAnyUseOfValue(1) &&
(LLD->isPredecessorOf(CondLHS) || LLD->isPredecessorOf(CondRHS))))
(RLD->hasAnyUseOfValue(1) &&
(RLD->isPredecessorOf(CondLHS) || RLD->isPredecessorOf(CondRHS))))
return false;
Addr = DAG.getNode(ISD::SELECT_CC, TheSelect->getDebugLoc(),