forked from OSchip/llvm-project
Add test case for truncate funnel shifts. NFC
llvm-svn: 355258
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@ -114,3 +114,26 @@ define i64 @test7(i64 %hi, i64 %lo, i64 %bits) nounwind {
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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define i64 @test8(i64 %hi, i64 %lo, i64 %bits) nounwind {
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; CHECK-LABEL: test8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: andb $63, %cl
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; CHECK-NEXT: negb %cl
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; CHECK-NEXT: shrq %cl, %rsi
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; CHECK-NEXT: movl %edx, %ecx
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; CHECK-NEXT: shlq %cl, %rax
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; CHECK-NEXT: orq %rsi, %rax
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; CHECK-NEXT: retq
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%tbits = trunc i64 %bits to i8
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%tand = and i8 %tbits, 63
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%tand64 = sub i8 64, %tand
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%and = zext i8 %tand to i64
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%and64 = zext i8 %tand64 to i64
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%sh_lo = lshr i64 %lo, %and64
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%sh_hi = shl i64 %hi, %and
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%sh = or i64 %sh_lo, %sh_hi
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ret i64 %sh
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}
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@ -459,6 +459,45 @@ define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind {
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ret i32 %sh
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}
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define i32 @test18(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test18:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
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; X86-NEXT: movl %edx, %ecx
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; X86-NEXT: andb $31, %cl
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; X86-NEXT: negb %cl
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; X86-NEXT: shrl %cl, %esi
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; X86-NEXT: movl %edx, %ecx
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; X86-NEXT: shll %cl, %eax
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; X86-NEXT: orl %esi, %eax
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: test18:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: andb $31, %cl
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; X64-NEXT: negb %cl
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; X64-NEXT: shrl %cl, %esi
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shll %cl, %eax
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; X64-NEXT: orl %esi, %eax
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; X64-NEXT: retq
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%tbits = trunc i32 %bits to i8
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%tand = and i8 %tbits, 31
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%tand64 = sub i8 32, %tand
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%and = zext i8 %tand to i32
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%and64 = zext i8 %tand64 to i32
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%sh_lo = lshr i32 %lo, %and64
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%sh_hi = shl i32 %hi, %and
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
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}
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; PR34641 - Masked Shift Counts
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define i32 @shld_safe_i32(i32, i32, i32) {
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