forked from OSchip/llvm-project
AMDGPU: Emit R_AMDGPU_ABS32_{HI,LO} for scratch buffer relocations
Reviewers: arsenm, rafael, kzhuravl Subscribers: rafael, arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D21400 llvm-svn: 273166
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d616cf07b2
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1c89eb7db0
llvm
lib/Target/AMDGPU/MCTargetDesc
test
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@ -21,10 +21,7 @@ public:
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AMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend);
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AMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend);
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protected:
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protected:
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
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const MCFixup &Fixup, bool IsPCRel) const override {
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const MCFixup &Fixup, bool IsPCRel) const override;
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return Fixup.getKind();
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}
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};
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};
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@ -37,6 +34,20 @@ AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
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ELF::EM_AMDGPU,
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ELF::EM_AMDGPU,
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HasRelocationAddend) { }
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HasRelocationAddend) { }
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unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
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const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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// SCRATCH_RSRC_DWORD[01] is a special global variable that represents
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// the scratch buffer.
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if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD0")
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return ELF::R_AMDGPU_ABS32_LO;
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if (Target.getSymA()->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
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return ELF::R_AMDGPU_ABS32_HI;
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llvm_unreachable("unhandled relocation type");
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}
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MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit,
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MCObjectWriter *llvm::createAMDGPUELFObjectWriter(bool Is64Bit,
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bool HasRelocationAddend,
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bool HasRelocationAddend,
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@ -8,9 +8,9 @@
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; ALL-LABEL: {{^}}large_alloca_compute_shader:
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; ALL-LABEL: {{^}}large_alloca_compute_shader:
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0, kind: FK_Data_4
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1, kind: FK_Data_4
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
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; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000
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; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000
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; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000
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; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000
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@ -0,0 +1,12 @@
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// RUN: llvm-mc -filetype=obj -triple amdgcn-- -mcpu=kaveri -show-encoding %s | llvm-readobj -relocations | FileCheck %s
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// CHECK: Relocations [
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// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
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// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
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// CHECK: ]
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kernel:
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s_mov_b32 s0, SCRATCH_RSRC_DWORD0
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s_mov_b32 s1, SCRATCH_RSRC_DWORD1
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.globl SCRATCH_RSRC_DWORD0
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