forked from OSchip/llvm-project
Reverted r313993.
This patch produces a crash and hexagon_vector_loop_carried_reuse_constant.ll test fails on Windows (llvm-clang-x86_64-expensive-checks-win build bot). llvm-svn: 314361
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@ -302,21 +302,6 @@ bool HexagonVectorLoopCarriedReuse::isEquivalentOperation(Instruction *I1,
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return false;
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}
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}
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// If both the Instructions are of Vector Type and any of the element
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// is integer constant, check their values too for equivalence.
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if (I1->getType()->isVectorTy() && I2->getType()->isVectorTy()) {
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unsigned NumOperands = I1->getNumOperands();
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for (unsigned i = 0; i < NumOperands; ++i) {
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ConstantInt *C1 = dyn_cast<ConstantInt>(I1->getOperand(i));
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ConstantInt *C2 = dyn_cast<ConstantInt>(I2->getOperand(i));
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if(!C1) continue;
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assert(C2);
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if (C1->getSExtValue() != C2->getSExtValue())
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return false;
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}
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}
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return true;
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}
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@ -1,86 +0,0 @@
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; RUN: opt < %s -hexagon-vlcr -adce -S | FileCheck %s
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; CHECK-NOT: %.hexagon.vlcr
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; ModuleID = 'hexagon_vector_loop_carried_reuse.c'
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source_filename = "hexagon_vector_loop_carried_reuse.c"
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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@W = external local_unnamed_addr global i32, align 4
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; Function Attrs: nounwind
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define void @foo(i8* noalias nocapture readonly %src, i8* noalias nocapture %dst, i32 %stride) local_unnamed_addr #0 {
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %src, i32 %stride
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%mul = mul nsw i32 %stride, 2
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%add.ptr1 = getelementptr inbounds i8, i8* %src, i32 %mul
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%0 = load i32, i32* @W, align 4, !tbaa !1
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%cmp55 = icmp sgt i32 %0, 0
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br i1 %cmp55, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%1 = bitcast i8* %add.ptr1 to <32 x i32>*
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%2 = load <32 x i32>, <32 x i32>* %1, align 128, !tbaa !5
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%incdec.ptr4 = getelementptr inbounds i8, i8* %add.ptr1, i32 128
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%3 = bitcast i8* %incdec.ptr4 to <32 x i32>*
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%4 = bitcast i8* %add.ptr to <32 x i32>*
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%5 = load <32 x i32>, <32 x i32>* %4, align 128, !tbaa !5
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%incdec.ptr2 = getelementptr inbounds i8, i8* %add.ptr, i32 128
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%6 = bitcast i8* %incdec.ptr2 to <32 x i32>*
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%7 = bitcast i8* %src to <32 x i32>*
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%8 = load <32 x i32>, <32 x i32>* %7, align 128, !tbaa !5
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%incdec.ptr = getelementptr inbounds i8, i8* %src, i32 128
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%9 = bitcast i8* %incdec.ptr to <32 x i32>*
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%10 = bitcast i8* %dst to <32 x i32>*
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %for.body
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%out.063 = phi <32 x i32>* [ %10, %for.body.lr.ph ], [ %incdec.ptr18, %for.body ]
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%p2.062 = phi <32 x i32>* [ %3, %for.body.lr.ph ], [ %incdec.ptr10, %for.body ]
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%p1.061 = phi <32 x i32>* [ %6, %for.body.lr.ph ], [ %incdec.ptr8, %for.body ]
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%p0.060 = phi <32 x i32>* [ %9, %for.body.lr.ph ], [ %incdec.ptr6, %for.body ]
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%i.059 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
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%a.sroa.0.058 = phi <32 x i32> [ %8, %for.body.lr.ph ], [ %11, %for.body ]
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%b.sroa.0.057 = phi <32 x i32> [ %5, %for.body.lr.ph ], [ %12, %for.body ]
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%c.sroa.0.056 = phi <32 x i32> [ %2, %for.body.lr.ph ], [ %13, %for.body ]
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%incdec.ptr6 = getelementptr inbounds <32 x i32>, <32 x i32>* %p0.060, i32 1
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%11 = load <32 x i32>, <32 x i32>* %p0.060, align 128, !tbaa !5
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%incdec.ptr8 = getelementptr inbounds <32 x i32>, <32 x i32>* %p1.061, i32 1
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%12 = load <32 x i32>, <32 x i32>* %p1.061, align 128, !tbaa !5
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%incdec.ptr10 = getelementptr inbounds <32 x i32>, <32 x i32>* %p2.062, i32 1
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%13 = load <32 x i32>, <32 x i32>* %p2.062, align 128, !tbaa !5
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%14 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %a.sroa.0.058, <32 x i32> %b.sroa.0.057, i32 4)
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%15 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %14, <32 x i32> %c.sroa.0.056)
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%16 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %11, <32 x i32> %12, i32 5)
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%17 = tail call <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32> %16, <32 x i32> %13)
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%18 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %17, <32 x i32> %15, i32 1)
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%incdec.ptr18 = getelementptr inbounds <32 x i32>, <32 x i32>* %out.063, i32 1
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store <32 x i32> %18, <32 x i32>* %out.063, align 128, !tbaa !5
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%add = add nuw nsw i32 %i.059, 128
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%cmp = icmp slt i32 %add, %0
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vmaxub.128B(<32 x i32>, <32 x i32>) #1
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #1
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attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-double,-long-calls" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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!llvm.ident = !{!0}
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!0 = !{!"QuIC LLVM Hexagon Clang version hexagon-clang-82-2622 (based on LLVM 5.0.0)"}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"int", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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!5 = !{!3, !3, i64 0}
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