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[TableGen] Add "InitValue": Handle operands with set bit values in decoder methods 

Summary:
The problem:
  When an operand had bits explicitly set to "1" (as in the InitValue.td test case attached), the decoder was ignoring those bits, and the DecoderMethod was receiving an input where the bits were still zero.

The solution:
  We added an "InitValue" variable that stores the initial value of the operand based on what bits were explicitly initialized to 1 in TableGen code. The generated decoder code then uses that initial value to initialize the "tmp" variable, then calls fieldFromInstruction to read the values for the remaining bits that were left unknown in TableGen.

This is mainly useful when there are variations of an instruction that differ based on what bits are set in the operands, since this change makes it possible to access those bits in a DecoderMethod. The DecoderMethod can use those bits to know how to handle the input.

Patch by Nicolas Guillemot

Reviewers: craig.topper, dsanders, fhahn

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D63741

llvm-svn: 368458
This commit is contained in:
Daniel Sanders 2019-08-09 17:30:33 +00:00
parent 59fbe516bd
commit 1c5542aa9d
2 changed files with 53 additions and 4 deletions
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35
llvm/test/TableGen/FixedLenDecoderEmitter/InitValue.td Normal file
View File

@ -0,0 +1,35 @@
// RUN: llvm-tblgen -gen-disassembler -I %p/../../../include %s | FileCheck %s
include "llvm/Target/Target.td"
def archInstrInfo : InstrInfo { }
def arch : Target {
let InstructionSet = archInstrInfo;
}
let OutOperandList = (outs), Size = 2 in {
def foo : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
field bits<16> SoftFail = 0;
bits<8> factor;
let factor{0} = 0; // zero initial value
let Inst{15-8} = factor{7-0};
}
def bar : Instruction {
let InOperandList = (ins i32imm:$factor);
field bits<16> Inst;
field bits<16> SoftFail = 0;
bits<8> factor;
let factor{0} = 1; // non-zero initial value
let Inst{15-8} = factor{7-0};
}
}
// CHECK: tmp = fieldFromInstruction(insn, 9, 7) << 1;
// CHECK: tmp = 0x1;
// CHECK: tmp |= fieldFromInstruction(insn, 9, 7) << 1;

22
llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
View File

@ -64,9 +64,10 @@ struct OperandInfo {
std::vector<EncodingField> Fields;
std::string Decoder;
bool HasCompleteDecoder;
uint64_t InitValue;
OperandInfo(std::string D, bool HCD)
: Decoder(std::move(D)), HasCompleteDecoder(HCD) {}
: Decoder(std::move(D)), HasCompleteDecoder(HCD), InitValue(0) {}
void addField(unsigned Base, unsigned Width, unsigned Offset) {
Fields.push_back(EncodingField(Base, Width, Offset));
@ -1103,12 +1104,15 @@ void FilterChooser::emitBinaryParser(raw_ostream &o, unsigned &Indentation,
bool &OpHasCompleteDecoder) const {
const std::string &Decoder = OpInfo.Decoder;
if (OpInfo.numFields() != 1)
o.indent(Indentation) << "tmp = 0;\n";
if (OpInfo.numFields() != 1 || OpInfo.InitValue != 0) {
o.indent(Indentation) << "tmp = 0x";
o.write_hex(OpInfo.InitValue);
o << ";\n";
}
for (const EncodingField &EF : OpInfo) {
o.indent(Indentation) << "tmp ";
if (OpInfo.numFields() != 1) o << '|';
if (OpInfo.numFields() != 1 || OpInfo.InitValue != 0) o << '|';
o << "= fieldFromInstruction"
<< "(insn, " << EF.Base << ", " << EF.Width << ')';
if (OpInfo.numFields() != 1 || EF.Offset != 0)
@ -2026,6 +2030,16 @@ populateInstruction(CodeGenTarget &Target, const Record &EncodingDef,
HasCompleteDecoderBit->getValue() : true;
OperandInfo OpInfo(Decoder, HasCompleteDecoder);
// Some bits of the operand may be required to be 1 depending on the
// instruction's encoding. Collect those bits.
if (const RecordVal *EncodedValue = EncodingDef.getValue(Op.second))
if (const BitsInit *OpBits = dyn_cast<BitsInit>(EncodedValue->getValue()))
for (unsigned I = 0; I < OpBits->getNumBits(); ++I)
if (const BitInit *OpBit = dyn_cast<BitInit>(OpBits->getBit(I)))
if (OpBit->getValue())
OpInfo.InitValue |= 1 << I;
unsigned Base = ~0U;
unsigned Width = 0;
unsigned Offset = 0;